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81a28f0089
This is a set of instructions that take just a single register as an operand, with no immediates. Because all instructions share the same format, I haven't added exhaustive bit testing to all instructions but just to the inc instruction. Differential Revision: https://reviews.llvm.org/D81968
27 lines
714 B
ArmAsm
27 lines
714 B
ArmAsm
; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
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; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
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foo:
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inc r12
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inc r29
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inc r6
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inc r20
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inc r0
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inc r31
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; CHECK: inc r12 ; encoding: [0xc3,0x94]
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; CHECK: inc r29 ; encoding: [0xd3,0x95]
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; CHECK: inc r6 ; encoding: [0x63,0x94]
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; CHECK: inc r20 ; encoding: [0x43,0x95]
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; CHECK: inc r0 ; encoding: [0x03,0x94]
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; CHECK: inc r31 ; encoding: [0xf3,0x95]
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; CHECK-INST: inc r12
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; CHECK-INST: inc r29
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; CHECK-INST: inc r6
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; CHECK-INST: inc r20
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; CHECK-INST: inc r0
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; CHECK-INST: inc r31
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