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35af3967fc
Add tests to make sure common instructions are accepted in RV64 and not just RV32. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D95150
14 lines
953 B
ArmAsm
14 lines
953 B
ArmAsm
# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-b,experimental-zba < %s 2>&1 | FileCheck %s
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# Too few operands
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sh1add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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# Too few operands
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sh2add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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# Too few operands
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sh3add t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
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slli.uw t0, t1, 0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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sh1add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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sh2add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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sh3add.uw t0, t1, t2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set
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