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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00
llvm-mirror/test/CodeGen
2016-11-11 19:25:48 +00:00
..
AArch64 [AArch64] Add test to show narrow zero store merging is disabled with strict align. NFC. 2016-11-11 19:25:48 +00:00
AMDGPU ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps() 2016-11-11 01:34:21 +00:00
ARM Revert "Use private linkage for MergedGlobals variables" on Darwin. 2016-11-11 17:50:09 +00:00
AVR [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
BPF
Generic Add -O0 support for @llvm.invariant.group.barrier by discarding it if it gets to ISel. 2016-11-07 16:47:20 +00:00
Hexagon [Hexagon] Separate Hexagon subreg indices for different register classes 2016-11-09 16:19:08 +00:00
Inputs
Lanai
Mips [mips] Renable small data section test. 2016-11-08 13:03:45 +00:00
MIR AMDGPU: Preserve vcc undef flags when inverting branch 2016-11-07 19:09:27 +00:00
MSP430 Fix PR27500: on MSP430 the branch destination offset is measured in words, not bytes. 2016-11-08 17:19:59 +00:00
NVPTX [NVPTX] Remove NVPTXFavorNonGenericAddrSpaces pass. 2016-10-31 21:51:42 +00:00
PowerPC [PowerPC] Add vector conversion builtins to altivec.h - LLVM portion 2016-11-11 14:41:19 +00:00
SPARC ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps() 2016-11-11 01:34:21 +00:00
SystemZ [SystemZ] Support CL(G)T instructions 2016-11-11 12:48:26 +00:00
Thumb Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently" 2016-11-03 14:08:01 +00:00
Thumb2 Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently" 2016-11-03 14:08:01 +00:00
WebAssembly [WebAssembly] Convert stackified IMPLICIT_DEF into constant 0. 2016-11-08 19:40:38 +00:00
WinEH
X86 [SelectionDAG] Add support for vector demandedelts in BSWAP opcodes 2016-11-11 11:51:29 +00:00
XCore