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45b647d5eb
This header includes CodeGen headers, and is not, itself, included by any Target headers, so move it into CodeGen to match the layering of its implementation. llvm-svn: 317647
58 lines
1.9 KiB
C++
58 lines
1.9 KiB
C++
//===- ARMMacroFusion.cpp - ARM Macro Fusion ----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file contains the ARM implementation of the DAG scheduling
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/// mutation to pair instructions back to back.
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//
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//===----------------------------------------------------------------------===//
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#include "ARMMacroFusion.h"
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#include "ARMSubtarget.h"
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#include "llvm/CodeGen/MacroFusion.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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namespace llvm {
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/// \brief Check if the instr pair, FirstMI and SecondMI, should be fused
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/// together. Given SecondMI, when FirstMI is unspecified, then check if
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/// SecondMI may be part of a fused pair at all.
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static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
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const TargetSubtargetInfo &TSI,
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const MachineInstr *FirstMI,
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const MachineInstr &SecondMI) {
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const ARMSubtarget &ST = static_cast<const ARMSubtarget&>(TSI);
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// Assume wildcards for unspecified instrs.
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unsigned FirstOpcode =
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FirstMI ? FirstMI->getOpcode()
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: static_cast<unsigned>(ARM::INSTRUCTION_LIST_END);
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unsigned SecondOpcode = SecondMI.getOpcode();
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if (ST.hasFuseAES())
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// Fuse AES crypto operations.
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switch(SecondOpcode) {
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// AES encode.
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case ARM::AESMC :
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return FirstOpcode == ARM::AESE ||
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FirstOpcode == ARM::INSTRUCTION_LIST_END;
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// AES decode.
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case ARM::AESIMC:
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return FirstOpcode == ARM::AESD ||
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FirstOpcode == ARM::INSTRUCTION_LIST_END;
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}
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return false;
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}
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std::unique_ptr<ScheduleDAGMutation> createARMMacroFusionDAGMutation () {
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return createMacroFusionDAGMutation(shouldScheduleAdjacent);
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}
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} // end namespace llvm
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