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813af3fadc
This commit verifies that the parsed machine instructions contain the implicit register operands as specified by the MCInstrDesc. Variadic and call instructions aren't verified. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10781 llvm-svn: 241537
44 lines
1.1 KiB
YAML
44 lines
1.1 KiB
YAML
# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
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# This test ensures that the MIR parser parses register mask operands correctly.
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--- |
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define i32 @compute(i32 %a) #0 {
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body:
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%c = mul i32 %a, 11
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ret i32 %c
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}
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define i32 @foo(i32 %a) #0 {
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entry:
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%b = call i32 @compute(i32 %a)
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ret i32 %b
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}
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attributes #0 = { "no-frame-pointer-elim"="false" }
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...
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---
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name: compute
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body:
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- id: 0
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name: body
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instructions:
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- '%eax = IMUL32rri8 %edi, 11, implicit-def %eflags'
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- 'RETQ %eax'
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...
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---
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# CHECK: name: foo
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name: foo
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body:
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- id: 0
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name: entry
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instructions:
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# CHECK: - 'PUSH64r %rax
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# CHECK-NEXT: - 'CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax'
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- 'PUSH64r %rax, implicit-def %rsp, implicit %rsp'
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- 'CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax'
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- '%rdx = POP64r implicit-def %rsp, implicit %rsp'
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- 'RETQ %eax'
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...
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