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c6df3d773b
Nearly all the changes to this pass have been done while maintaining and updating other parts of LLVM. LLVM has had another pass, SROA, which has superseded ScalarReplAggregates for quite some time. Differential Revision: http://reviews.llvm.org/D21316 llvm-svn: 272737
30 lines
802 B
LLVM
30 lines
802 B
LLVM
; RUN: opt -inline -sroa -max-cg-scc-iterations=1 -disable-output < %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin10.3"
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declare i8* @f1(i8*) ssp align 2
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define linkonce_odr void @f2(i8* %t) inlinehint ssp {
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entry:
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unreachable
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}
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define linkonce_odr void @f3(void (i8*)* %__f) ssp {
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entry:
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%__f_addr = alloca void (i8*)*, align 8
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store void (i8*)* %__f, void (i8*)** %__f_addr
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%0 = load void (i8*)*, void (i8*)** %__f_addr, align 8
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call void %0(i8* undef)
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call i8* @f1(i8* undef) ssp
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unreachable
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}
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define linkonce_odr void @f4(i8* %this) ssp align 2 {
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entry:
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%0 = alloca i32
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call void @f3(void (i8*)* @f2) ssp
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ret void
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}
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