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llvm-mirror/test/MC/X86/intel-syntax-2.s
Michael Zuckerman b36f5b984e [x86] translating "fp" (floating point) instructions from {fadd,fdiv,fmul,fsub,fsubr,fdivr} to {faddp,fdivp,fmulp,fsubp,fsubrp,fdivrp}
LLVM Missing the following instructions: fadd\fdiv\fmul\fsub\fsubr\fdivr.
GAS and MS supporting this instruction and lowering them in to a faddp\fdivp\fmulp\fsubp\fsubrp\fdivrp instructions.

Differential Revision: http://reviews.llvm.org/D14217

llvm-svn: 252908
2015-11-12 16:58:51 +00:00

32 lines
582 B
ArmAsm

// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=att %s | FileCheck %s
.intel_syntax
_test:
// CHECK: movl $257, -4(%rsp)
mov DWORD PTR [RSP - 4], 257
.att_syntax
// CHECK: movl $257, -4(%rsp)
movl $257, -4(%rsp)
_test2:
.intel_syntax noprefix
mov DWORD PTR [RSP - 4], 255
// CHECK: movl $255, -4(%rsp)
.att_syntax prefix
movl $255, -4(%rsp)
// CHECK: movl $255, -4(%rsp)
_test3:
fadd
// CHECK: faddp %st(1)
fmul
// CHECK: fmulp %st(1)
fsub
// CHECK: fsubp %st(1)
fsubr
// CHECK: fsubrp %st(1)
fdiv
// CHECK: fdivp %st(1)
fdivr
// CHECK: fdivrp %st(1)