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https://github.com/RPCS3/llvm-mirror.git
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023bdc26f9
Summary: Without the BFI update, some hot blocks are incorrectly treated as cold code. This fixes a FDO perf regression in the TSVC benchmark from D71288. Reviewers: davidxl Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73146
213 lines
6.4 KiB
LLVM
213 lines
6.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
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; cmp with single-use load, should not form branch.
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define i32 @test1(double %a, double* nocapture %b, i32 %x, i32 %y) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: ucomisd (%rdi), %xmm0
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; CHECK-NEXT: cmovbel %edx, %eax
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; CHECK-NEXT: retq
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%load = load double, double* %b, align 8
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%cmp = fcmp olt double %load, %a
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%cond = select i1 %cmp, i32 %x, i32 %y
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ret i32 %cond
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}
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; Sanity check: no load.
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define i32 @test2(double %a, double %b, i32 %x, i32 %y) {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmovbel %esi, %eax
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; CHECK-NEXT: retq
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%cmp = fcmp ogt double %a, %b
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%cond = select i1 %cmp, i32 %x, i32 %y
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ret i32 %cond
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}
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; Multiple uses of the load.
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define i32 @test4(i32 %a, i32* nocapture %b, i32 %x, i32 %y) {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl (%rsi), %eax
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; CHECK-NEXT: cmpl %edi, %eax
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; CHECK-NEXT: cmovael %ecx, %edx
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; CHECK-NEXT: addl %edx, %eax
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; CHECK-NEXT: retq
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%load = load i32, i32* %b, align 4
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%cmp = icmp ult i32 %load, %a
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%cond = select i1 %cmp, i32 %x, i32 %y
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%add = add i32 %cond, %load
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ret i32 %add
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}
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; Multiple uses of the cmp.
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define i32 @test5(i32 %a, i32* nocapture %b, i32 %x, i32 %y) {
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: cmpl %edi, (%rsi)
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; CHECK-NEXT: cmoval %edi, %eax
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; CHECK-NEXT: cmovael %edx, %eax
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; CHECK-NEXT: retq
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%load = load i32, i32* %b, align 4
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%cmp = icmp ult i32 %load, %a
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%cmp1 = icmp ugt i32 %load, %a
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%cond = select i1 %cmp1, i32 %a, i32 %y
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%cond5 = select i1 %cmp, i32 %cond, i32 %x
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ret i32 %cond5
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}
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; Zero-extended select.
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define void @test6(i32 %a, i32 %x, i32* %y.ptr, i64* %z.ptr) {
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; CHECK-LABEL: test6:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: cmovnsl (%rdx), %esi
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; CHECK-NEXT: movq %rsi, (%rcx)
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; CHECK-NEXT: retq
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entry:
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%y = load i32, i32* %y.ptr
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%cmp = icmp slt i32 %a, 0
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%z = select i1 %cmp, i32 %x, i32 %y
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%z.ext = zext i32 %z to i64
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store i64 %z.ext, i64* %z.ptr
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ret void
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}
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; If a select is not obviously predictable, don't turn it into a branch.
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define i32 @weighted_select1(i32 %a, i32 %b) {
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; CHECK-LABEL: weighted_select1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: cmovnel %edi, %eax
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; CHECK-NEXT: retq
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !15
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ret i32 %sel
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}
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; If a select is obviously predictable, turn it into a branch.
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define i32 @weighted_select2(i32 %a, i32 %b) {
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; CHECK-LABEL: weighted_select2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: jne .LBB6_2
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; CHECK-NEXT: # %bb.1: # %select.false
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: .LBB6_2: # %select.end
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; CHECK-NEXT: retq
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !16
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ret i32 %sel
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}
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; Note the reversed profile weights: it doesn't matter if it's
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; obviously true or obviously false.
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; Either one should become a branch rather than conditional move.
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; TODO: But likely true vs. likely false should affect basic block placement?
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define i32 @weighted_select3(i32 %a, i32 %b) {
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; CHECK-LABEL: weighted_select3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: je .LBB7_1
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; CHECK-NEXT: # %bb.2: # %select.end
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB7_1: # %select.false
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: retq
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !17
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ret i32 %sel
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}
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; Weightlessness is no reason to die.
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define i32 @unweighted_select(i32 %a, i32 %b) {
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; CHECK-LABEL: unweighted_select:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: cmovnel %edi, %eax
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; CHECK-NEXT: retq
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !18
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ret i32 %sel
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}
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define i32 @weighted_select_optsize(i32 %a, i32 %b) optsize {
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; CHECK-LABEL: weighted_select_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: cmovnel %edi, %eax
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; CHECK-NEXT: retq
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !16
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ret i32 %sel
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}
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define i32 @weighted_select_pgso(i32 %a, i32 %b) !prof !14 {
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; CHECK-LABEL: weighted_select_pgso:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: cmovnel %edi, %eax
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; CHECK-NEXT: retq
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !16
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ret i32 %sel
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}
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; If two selects in a row are predictable, turn them into branches.
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define i32 @weighted_selects(i32 %a, i32 %b) !prof !19 {
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; CHECK-LABEL: weighted_selects:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: movl %edi, %ecx
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; CHECK-NEXT: jne .LBB11_2
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; CHECK-NEXT: # %bb.1: # %select.false
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: .LBB11_2: # %select.end
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; CHECK-NEXT: testl %ecx, %ecx
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; CHECK-NEXT: jne .LBB11_4
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; CHECK-NEXT: # %bb.3: # %select.false2
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: .LBB11_4: # %select.end1
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; CHECK-NEXT: retq
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !16
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%cmp1 = icmp ne i32 %sel, 0
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%sel1 = select i1 %cmp1, i32 %b, i32 %a, !prof !16
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ret i32 %sel1
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}
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"ProfileSummary", !1}
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!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
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!2 = !{!"ProfileFormat", !"InstrProf"}
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!3 = !{!"TotalCount", i64 10000}
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!4 = !{!"MaxCount", i64 10}
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!5 = !{!"MaxInternalCount", i64 1}
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!6 = !{!"MaxFunctionCount", i64 1000}
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!7 = !{!"NumCounts", i64 3}
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!8 = !{!"NumFunctions", i64 3}
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!9 = !{!"DetailedSummary", !10}
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!10 = !{!11, !12, !13}
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!11 = !{i32 10000, i64 100, i32 1}
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!12 = !{i32 999000, i64 100, i32 1}
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!13 = !{i32 999999, i64 1, i32 2}
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!14 = !{!"function_entry_count", i64 0}
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!15 = !{!"branch_weights", i32 1, i32 99}
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!16 = !{!"branch_weights", i32 1, i32 100}
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!17 = !{!"branch_weights", i32 100, i32 1}
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!18 = !{!"branch_weights", i32 0, i32 0}
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!19 = !{!"function_entry_count", i64 100}
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