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6e75027132
While working on D97208 I noticed that these greedy regular expressions prevent tests from failing when (%rip) appears after a constant pool label when it didn't before. Reviewed By: RKSimon, pengfei Differential Revision: https://reviews.llvm.org/D99460
102 lines
3.2 KiB
LLVM
102 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; RUN: llc < %s -fast-isel -mtriple=i686-- -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s
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define double @fneg_f64(double %x) nounwind {
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; CHECK-LABEL: fneg_f64:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movq %xmm0, %rax
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; CHECK-NEXT: movabsq $-9223372036854775808, %rcx ## imm = 0x8000000000000000
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; CHECK-NEXT: xorq %rax, %rcx
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; CHECK-NEXT: movq %rcx, %xmm0
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; CHECK-NEXT: retq
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;
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; SSE2-LABEL: fneg_f64:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pushl %ebp
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; SSE2-NEXT: movl %esp, %ebp
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; SSE2-NEXT: andl $-8, %esp
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; SSE2-NEXT: subl $8, %esp
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; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; SSE2-NEXT: xorps {{\.LCPI[0-9]+_[0-9]+}}, %xmm0
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; SSE2-NEXT: movlps %xmm0, (%esp)
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; SSE2-NEXT: fldl (%esp)
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; SSE2-NEXT: movl %ebp, %esp
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; SSE2-NEXT: popl %ebp
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; SSE2-NEXT: retl
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%y = fneg double %x
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ret double %y
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}
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define float @fneg_f32(float %x) nounwind {
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; CHECK-LABEL: fneg_f32:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: xorl $2147483648, %eax ## imm = 0x80000000
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; CHECK-NEXT: movd %eax, %xmm0
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; CHECK-NEXT: retq
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;
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; SSE2-LABEL: fneg_f32:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pushl %eax
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; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE2-NEXT: xorps {{\.LCPI[0-9]+_[0-9]+}}, %xmm0
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; SSE2-NEXT: movss %xmm0, (%esp)
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; SSE2-NEXT: flds (%esp)
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; SSE2-NEXT: popl %eax
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; SSE2-NEXT: retl
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%y = fneg float %x
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ret float %y
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}
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define void @fneg_f64_mem(double* %x, double* %y) nounwind {
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; CHECK-LABEL: fneg_f64_mem:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: movq %xmm0, %rax
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; CHECK-NEXT: movabsq $-9223372036854775808, %rcx ## imm = 0x8000000000000000
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; CHECK-NEXT: xorq %rax, %rcx
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; CHECK-NEXT: movq %rcx, %xmm0
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; CHECK-NEXT: movq %xmm0, (%rsi)
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; CHECK-NEXT: retq
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;
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; SSE2-LABEL: fneg_f64_mem:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; SSE2-NEXT: xorps {{\.LCPI[0-9]+_[0-9]+}}, %xmm0
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; SSE2-NEXT: movsd %xmm0, (%eax)
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; SSE2-NEXT: retl
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%a = load double, double* %x
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%b = fneg double %a
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store double %b, double* %y
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ret void
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}
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define void @fneg_f32_mem(float* %x, float* %y) nounwind {
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; CHECK-LABEL: fneg_f32_mem:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: xorl $2147483648, %eax ## imm = 0x80000000
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; CHECK-NEXT: movd %eax, %xmm0
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; CHECK-NEXT: movd %xmm0, (%rsi)
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; CHECK-NEXT: retq
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;
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; SSE2-LABEL: fneg_f32_mem:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE2-NEXT: movd %xmm0, %ecx
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; SSE2-NEXT: xorl $2147483648, %ecx # imm = 0x80000000
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; SSE2-NEXT: movd %ecx, %xmm0
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; SSE2-NEXT: movd %xmm0, (%eax)
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; SSE2-NEXT: retl
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%a = load float, float* %x
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%b = fneg float %a
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store float %b, float* %y
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ret void
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}
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