mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 11:13:28 +01:00
ab4f1aa423
When SGPRs are spilled to VGPRs, they can overwrite any lane. We need to preserve the value of inactive lanes in function calls, so we save the register even if it is marked as caller saved. Also, teach buildPrologSpill to work when no registers are free like in CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir and update the comment on findScratchNonCalleeSaveRegister as it is not used anymore to realign the stack pointer since D95865. Differential Revision: https://reviews.llvm.org/D95946
61 lines
2.2 KiB
YAML
61 lines
2.2 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -stress-regalloc=2 -start-before=greedy -stop-after=virtregmap -o - %s | FileCheck %s
|
|
|
|
# Test that a spill of a copy of m0 is not folded to be a spill of m0 directly.
|
|
|
|
---
|
|
|
|
name: merge_sgpr_spill_into_copy_from_m0
|
|
tracksRegLiveness: true
|
|
machineFunctionInfo:
|
|
isEntryFunction: true
|
|
body: |
|
|
bb.0:
|
|
|
|
; CHECK-LABEL: name: merge_sgpr_spill_into_copy_from_m0
|
|
; CHECK: liveins: $vgpr0
|
|
; CHECK: S_NOP 0, implicit-def $m0
|
|
; CHECK: $sgpr0 = S_MOV_B32 $m0
|
|
; CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, $vgpr0
|
|
; CHECK: $sgpr0 = V_READLANE_B32 $vgpr0, 0
|
|
; CHECK: S_NOP 0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0, implicit killed renamable $sgpr0
|
|
; CHECK: $sgpr0 = V_READLANE_B32 $vgpr0, 0
|
|
; CHECK: $m0 = S_MOV_B32 killed $sgpr0
|
|
; CHECK: S_NOP 0
|
|
; CHECK: S_SENDMSG 0, implicit $m0, implicit $exec
|
|
S_NOP 0, implicit-def $m0
|
|
%0:sreg_32 = COPY $m0
|
|
S_NOP 0, implicit-def %1:sreg_32, implicit-def %2:sreg_32, implicit %0
|
|
$m0 = COPY %0
|
|
S_SENDMSG 0, implicit $m0, implicit $exec
|
|
|
|
...
|
|
|
|
# Test that a reload into a copy of m0 is not folded to be a reload of m0 directly.
|
|
|
|
---
|
|
|
|
name: reload_sgpr_spill_into_copy_to_m0
|
|
tracksRegLiveness: true
|
|
machineFunctionInfo:
|
|
isEntryFunction: true
|
|
body: |
|
|
bb.0:
|
|
|
|
; CHECK-LABEL: name: reload_sgpr_spill_into_copy_to_m0
|
|
; CHECK: liveins: $vgpr0
|
|
; CHECK: S_NOP 0, implicit-def renamable $sgpr0, implicit-def dead renamable $sgpr1, implicit-def $m0
|
|
; CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr0, 0, $vgpr0
|
|
; CHECK: $sgpr0 = V_READLANE_B32 $vgpr0, 0
|
|
; CHECK: S_NOP 0, implicit killed renamable $sgpr0, implicit-def dead renamable $sgpr1, implicit-def dead renamable $sgpr0
|
|
; CHECK: $sgpr0 = V_READLANE_B32 $vgpr0, 0
|
|
; CHECK: $m0 = S_MOV_B32 killed $sgpr0
|
|
; CHECK: S_NOP 0
|
|
; CHECK: S_SENDMSG 0, implicit $m0, implicit $exec
|
|
S_NOP 0, implicit-def %0:sreg_32, implicit-def %1:sreg_32, implicit-def $m0
|
|
S_NOP 0, implicit %0, implicit-def %3:sreg_32, implicit-def %4:sreg_32
|
|
$m0 = COPY %0
|
|
S_SENDMSG 0, implicit $m0, implicit $exec
|
|
|
|
...
|