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59de807f62
This is the groundwork required to implement strictfp. For now, this should be NFC for regular instructoins (many instructions just gain an extra use of a reserved register). Regalloc won't rematerialize instructions with reads of physical registers, but we were suffering from that anyway with the exec reads. Should add it for all the related FP uses (possibly with some extras). I did not add it to either the gpr index mode instructions (or every single VALU instruction) since it's a ridiculous feature already modeled as an arbitrary side effect. Also work towards marking instructions with FP exceptions. This doesn't actually set the bit yet since this would start to change codegen. It seems nofpexcept is currently not implied from the regular IR FP operations. Add it to some MIR tests where I think it might matter.
22 lines
638 B
YAML
22 lines
638 B
YAML
# RUN: llc -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass si-insert-waitcnts -o - %s | FileCheck %s
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...
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# CHECK-LABEL: name: waitcnt-permute{{$}}
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# CHECK: DS_BPERMUTE_B32
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# CHECK-NEXT: S_WAITCNT 127
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name: waitcnt-permute
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liveins:
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- { reg: '$vgpr0' }
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- { reg: '$vgpr1' }
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- { reg: '$sgpr30_sgpr31' }
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31
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$vgpr0 = DS_BPERMUTE_B32 killed $vgpr0, killed $vgpr1, 0, implicit $exec
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$vgpr0 = V_ADD_F32_e32 1065353216, killed $vgpr0, implicit $mode, implicit $exec
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S_SETPC_B64_return killed $sgpr30_sgpr31, implicit killed $vgpr0
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...
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