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llvm-mirror/test/CodeGen/MSP430/selectcc.ll
Sanjay Patel f36e8e2518 [DAGCombiner] add operation legality checks before creating shift ops (PR43542)
As discussed on llvm-dev and:
https://bugs.llvm.org/show_bug.cgi?id=43542
...we have transforms that assume shift operations are legal and transforms to
use them are profitable, but that may not hold for simple targets.

In this case, the MSP430 target custom lowers shifts by repeating (many)
simpler/fixed ops. That can be avoided by keeping this code as setcc/select.

Differential Revision: https://reviews.llvm.org/D68397

llvm-svn: 373666
2019-10-03 21:34:04 +00:00

47 lines
1.2 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=msp430-- < %s | FileCheck %s
define i16 @select_to_shifts_i16(i16 %a, i16 %b) {
; CHECK-LABEL: select_to_shifts_i16:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov r12, r14
; CHECK-NEXT: clr r12
; CHECK-NEXT: bit #2, r14
; CHECK-NEXT: jeq .LBB0_2
; CHECK-NEXT: ; %bb.1:
; CHECK-NEXT: mov r13, r12
; CHECK-NEXT: .LBB0_2:
; CHECK-NEXT: ret
%and = and i16 %a, 2
%tobool = icmp eq i16 %and, 0
%select = select i1 %tobool, i16 0, i16 %b
ret i16 %select
}
define i32 @select_to_shifts_i32(i32 %a, i32 %b) {
; CHECK-LABEL: select_to_shifts_i32:
; CHECK: ; %bb.0:
; CHECK-NEXT: mov r12, r11
; CHECK-NEXT: and #2, r11
; CHECK-NEXT: clr r13
; CHECK-NEXT: tst r11
; CHECK-NEXT: clr r12
; CHECK-NEXT: jne .LBB1_3
; CHECK-NEXT: ; %bb.1:
; CHECK-NEXT: tst r11
; CHECK-NEXT: jne .LBB1_4
; CHECK-NEXT: .LBB1_2:
; CHECK-NEXT: ret
; CHECK-NEXT: .LBB1_3:
; CHECK-NEXT: mov r14, r12
; CHECK-NEXT: tst r11
; CHECK-NEXT: jeq .LBB1_2
; CHECK-NEXT: .LBB1_4:
; CHECK-NEXT: mov r15, r13
; CHECK-NEXT: ret
%and = and i32 %a, 2
%tobool = icmp eq i32 %and, 0
%select = select i1 %tobool, i32 0, i32 %b
ret i32 %select
}