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10af09a34f
The patch adds a possibility to make library calls on NVPTX. An important thing about library functions - they must be defined within the current module. This basically should guarantee that we produce a valid PTX assembly (without calls to not defined functions). The one who wants to use the libcalls is probably will have to link against compiler-rt or any other implementation. Currently, it's completely impossible to make library calls because of error LLVM ERROR: Cannot select: i32 = ExternalSymbol '...'. But we can lower ExternalSymbol to TargetExternalSymbol and verify if the function definition is available. Also, there was an issue with a DAG during legalisation. When we expand instruction into libcall, the inner call-chain isn't being "integrated" into outer chain. Since the last "data-flow" (call retval load) node is located in call-chain earlier than CALLSEQ_END node, the latter becomes a leaf and therefore a dead node (and is being removed quite fast). Proposed here solution relies on another data-flow pseudo nodes (ProxyReg) which purpose is only to keep CALLSEQ_END at legalisation and instruction selection phases - we remove the pseudo instructions before register scheduling phase. Patch by Denys Zariaiev! Differential Revision: https://reviews.llvm.org/D34708 llvm-svn: 350069
26 lines
1.0 KiB
LLVM
26 lines
1.0 KiB
LLVM
; RUN: llc -march=nvptx64 -stop-before=nvptx-proxyreg-erasure < %s 2>&1 \
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; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE
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; RUN: llc -march=nvptx64 -stop-after=nvptx-proxyreg-erasure < %s 2>&1 \
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; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER
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; Check ProxyRegErasure pass MIR manipulation.
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declare <4 x i32> @callee_vec_i32()
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define <4 x i32> @check_vec_i32() {
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; MIR: body:
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; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}}
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; MIR-DAG: %0:int32regs, %1:int32regs, %2:int32regs, %3:int32regs = LoadParamMemV4I32 0
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; MIR-DAG: Callseq_End {{[0-9]+}}
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; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0
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; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1
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; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2
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; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3
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; MIR-BEFORE-DAG: StoreRetvalV4I32 killed %4, killed %5, killed %6, killed %7, 0
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; MIR-AFTER-DAG: StoreRetvalV4I32 killed %0, killed %1, killed %2, killed %3, 0
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%ret = call <4 x i32> @callee_vec_i32()
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ret <4 x i32> %ret
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}
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