mirror of
https://github.com/RPCS3/llvm-mirror.git
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c00f41ef21
directly on the mac. This is very early, doesn't support relocations and has a terrible hack to avoid .machine from being printed, but despite that it generates an bitwise-identical-to-cctools .o file for stuff like this: define i32 @test() nounwind { ret i32 42 } I don't plan to continue pushing this forward, but if anyone else was interested in doing it, it should be really straight-forward. llvm-svn: 119136
697 lines
26 KiB
C++
697 lines
26 KiB
C++
//===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly --------=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to PowerPC assembly language. This printer is
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// the output mechanism used by `llc'.
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//
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// Documentation at http://developer.apple.com/documentation/DeveloperTools/
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// Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asmprinter"
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#include "PPC.h"
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#include "PPCPredicates.h"
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#include "PPCTargetMachine.h"
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#include "PPCSubtarget.h"
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#include "llvm/Analysis/DebugInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfoImpls.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Target/Mangler.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetRegistry.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringSet.h"
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#include "llvm/ADT/SmallString.h"
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#include "InstPrinter/PPCInstPrinter.h"
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using namespace llvm;
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namespace {
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class PPCAsmPrinter : public AsmPrinter {
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protected:
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DenseMap<MCSymbol*, MCSymbol*> TOC;
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const PPCSubtarget &Subtarget;
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uint64_t TOCLabelID;
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public:
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explicit PPCAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
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: AsmPrinter(TM, Streamer),
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Subtarget(TM.getSubtarget<PPCSubtarget>()), TOCLabelID(0) {}
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virtual const char *getPassName() const {
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return "PowerPC Assembly Printer";
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}
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virtual void EmitInstruction(const MachineInstr *MI);
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void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &O);
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bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &O);
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MachineLocation getDebugValueLocation(const MachineInstr *MI) const {
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MachineLocation Location;
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assert(MI->getNumOperands() == 4 && "Invalid no. of machine operands!");
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// Frame address. Currently handles register +- offset only.
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if (MI->getOperand(0).isReg() && MI->getOperand(2).isImm())
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Location.set(MI->getOperand(0).getReg(), MI->getOperand(2).getImm());
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else {
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DEBUG(dbgs() << "DBG_VALUE instruction ignored! " << *MI << "\n");
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}
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return Location;
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}
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};
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/// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
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class PPCLinuxAsmPrinter : public PPCAsmPrinter {
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public:
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explicit PPCLinuxAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
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: PPCAsmPrinter(TM, Streamer) {}
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virtual const char *getPassName() const {
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return "Linux PPC Assembly Printer";
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}
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bool doFinalization(Module &M);
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virtual void EmitFunctionEntryLabel();
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};
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/// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac
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/// OS X
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class PPCDarwinAsmPrinter : public PPCAsmPrinter {
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public:
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explicit PPCDarwinAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
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: PPCAsmPrinter(TM, Streamer) {}
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virtual const char *getPassName() const {
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return "Darwin PPC Assembly Printer";
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}
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bool doFinalization(Module &M);
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void EmitStartOfAsmFile(Module &M);
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void EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs);
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};
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} // end of anonymous namespace
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/// stripRegisterPrefix - This method strips the character prefix from a
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/// register name so that only the number is left. Used by for linux asm.
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static const char *stripRegisterPrefix(const char *RegName) {
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switch (RegName[0]) {
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case 'r':
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case 'f':
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case 'v': return RegName + 1;
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case 'c': if (RegName[1] == 'r') return RegName + 2;
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}
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return RegName;
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}
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void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
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raw_ostream &O) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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switch (MO.getType()) {
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case MachineOperand::MO_Register: {
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const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg());
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// Linux assembler (Others?) does not take register mnemonics.
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// FIXME - What about special registers used in mfspr/mtspr?
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if (!Subtarget.isDarwin()) RegName = stripRegisterPrefix(RegName);
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O << RegName;
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return;
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}
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case MachineOperand::MO_Immediate:
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O << MO.getImm();
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return;
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case MachineOperand::MO_MachineBasicBlock:
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O << *MO.getMBB()->getSymbol();
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return;
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case MachineOperand::MO_JumpTableIndex:
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O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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// FIXME: PIC relocation model
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return;
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case MachineOperand::MO_ConstantPoolIndex:
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O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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return;
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case MachineOperand::MO_BlockAddress:
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O << *GetBlockAddressSymbol(MO.getBlockAddress());
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return;
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case MachineOperand::MO_ExternalSymbol: {
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// Computing the address of an external symbol, not calling it.
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if (TM.getRelocationModel() == Reloc::Static) {
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O << *GetExternalSymbolSymbol(MO.getSymbolName());
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return;
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}
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MCSymbol *NLPSym =
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OutContext.GetOrCreateSymbol(StringRef(MAI->getGlobalPrefix())+
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MO.getSymbolName()+"$non_lazy_ptr");
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MachineModuleInfoImpl::StubValueTy &StubSym =
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MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(NLPSym);
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if (StubSym.getPointer() == 0)
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StubSym = MachineModuleInfoImpl::
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StubValueTy(GetExternalSymbolSymbol(MO.getSymbolName()), true);
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O << *NLPSym;
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return;
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}
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case MachineOperand::MO_GlobalAddress: {
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// Computing the address of a global symbol, not calling it.
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const GlobalValue *GV = MO.getGlobal();
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MCSymbol *SymToPrint;
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// External or weakly linked global variables need non-lazily-resolved stubs
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if (TM.getRelocationModel() != Reloc::Static &&
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(GV->isDeclaration() || GV->isWeakForLinker())) {
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if (!GV->hasHiddenVisibility()) {
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SymToPrint = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
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MachineModuleInfoImpl::StubValueTy &StubSym =
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MMI->getObjFileInfo<MachineModuleInfoMachO>()
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.getGVStubEntry(SymToPrint);
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if (StubSym.getPointer() == 0)
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StubSym = MachineModuleInfoImpl::
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StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage());
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} else if (GV->isDeclaration() || GV->hasCommonLinkage() ||
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GV->hasAvailableExternallyLinkage()) {
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SymToPrint = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
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MachineModuleInfoImpl::StubValueTy &StubSym =
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MMI->getObjFileInfo<MachineModuleInfoMachO>().
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getHiddenGVStubEntry(SymToPrint);
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if (StubSym.getPointer() == 0)
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StubSym = MachineModuleInfoImpl::
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StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage());
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} else {
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SymToPrint = Mang->getSymbol(GV);
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}
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} else {
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SymToPrint = Mang->getSymbol(GV);
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}
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O << *SymToPrint;
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printOffset(MO.getOffset(), O);
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return;
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}
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default:
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O << "<unknown operand type: " << MO.getType() << ">";
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return;
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}
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}
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/// PrintAsmOperand - Print out an operand for an inline asm expression.
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///
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bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode, raw_ostream &O) {
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// Does this asm operand have a single letter operand modifier?
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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default: return true; // Unknown modifier.
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case 'c': // Don't print "$" before a global var name or constant.
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break; // PPC never has a prefix.
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case 'L': // Write second word of DImode reference.
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// Verify that this operand has two consecutive registers.
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if (!MI->getOperand(OpNo).isReg() ||
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OpNo+1 == MI->getNumOperands() ||
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!MI->getOperand(OpNo+1).isReg())
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return true;
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++OpNo; // Return the high-part.
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break;
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case 'I':
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// Write 'i' if an integer constant, otherwise nothing. Used to print
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// addi vs add, etc.
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if (MI->getOperand(OpNo).isImm())
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O << "i";
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return false;
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}
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}
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printOperand(MI, OpNo, O);
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return false;
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}
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// At the moment, all inline asm memory operands are a single register.
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// In any case, the output of this routine should always be just one
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// assembler operand.
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bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode,
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raw_ostream &O) {
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier.
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assert(MI->getOperand(OpNo).isReg());
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O << "0(";
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printOperand(MI, OpNo, O);
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O << ")";
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return false;
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}
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/// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
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/// the current output stream.
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///
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void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MCInst TmpInst;
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// Lower multi-instruction pseudo operations.
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switch (MI->getOpcode()) {
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default: break;
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case TargetOpcode::DBG_VALUE: {
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if (!isVerbose() || !OutStreamer.hasRawTextSupport()) return;
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SmallString<32> Str;
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raw_svector_ostream O(Str);
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unsigned NOps = MI->getNumOperands();
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assert(NOps==4);
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O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
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// cast away const; DIetc do not take const operands for some reason.
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DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata()));
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O << V.getName();
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O << " <- ";
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// Frame address. Currently handles register +- offset only.
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assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm());
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O << '['; printOperand(MI, 0, O); O << '+'; printOperand(MI, 1, O);
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O << ']';
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O << "+";
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printOperand(MI, NOps-2, O);
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OutStreamer.EmitRawText(O.str());
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return;
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}
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case PPC::MovePCtoLR:
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case PPC::MovePCtoLR8: {
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// Transform %LR = MovePCtoLR
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// Into this, where the label is the PIC base:
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// bl L1$pb
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// L1$pb:
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MCSymbol *PICBase = MF->getPICBaseSymbol();
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// Emit the 'bl'.
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TmpInst.setOpcode(PPC::BL_Darwin); // Darwin vs SVR4 doesn't matter here.
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// FIXME: We would like an efficient form for this, so we don't have to do
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// a lot of extra uniquing.
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TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::
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Create(PICBase, OutContext)));
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OutStreamer.EmitInstruction(TmpInst);
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// Emit the label.
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OutStreamer.EmitLabel(PICBase);
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return;
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}
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case PPC::LDtoc: {
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// Transform %X3 = LDtoc <ga:@min1>, %X2
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LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
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// Change the opcode to LD, and the global address operand to be a
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// reference to the TOC entry we will synthesize later.
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TmpInst.setOpcode(PPC::LD);
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const MachineOperand &MO = MI->getOperand(1);
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assert(MO.isGlobal());
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// Map symbol -> label of TOC entry.
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MCSymbol *&TOCEntry = TOC[Mang->getSymbol(MO.getGlobal())];
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if (TOCEntry == 0)
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TOCEntry = GetTempSymbol("C", TOCLabelID++);
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const MCExpr *Exp =
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MCSymbolRefExpr::Create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC,
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OutContext);
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TmpInst.getOperand(1) = MCOperand::CreateExpr(Exp);
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OutStreamer.EmitInstruction(TmpInst);
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return;
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}
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case PPC::MFCRpseud:
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// Transform: %R3 = MFCRpseud %CR7
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// Into: %R3 = MFCR ;; cr7
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OutStreamer.AddComment(PPCInstPrinter::
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getRegisterName(MI->getOperand(1).getReg()));
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TmpInst.setOpcode(PPC::MFCR);
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TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
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OutStreamer.EmitInstruction(TmpInst);
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return;
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}
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LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
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OutStreamer.EmitInstruction(TmpInst);
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}
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void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() {
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if (!Subtarget.isPPC64()) // linux/ppc32 - Normal entry label.
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return AsmPrinter::EmitFunctionEntryLabel();
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// Emit an official procedure descriptor.
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// FIXME 64-bit SVR4: Use MCSection here!
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OutStreamer.EmitRawText(StringRef("\t.section\t\".opd\",\"aw\""));
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OutStreamer.EmitRawText(StringRef("\t.align 3"));
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OutStreamer.EmitLabel(CurrentFnSym);
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OutStreamer.EmitRawText("\t.quad .L." + Twine(CurrentFnSym->getName()) +
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",.TOC.@tocbase");
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OutStreamer.EmitRawText(StringRef("\t.previous"));
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OutStreamer.EmitRawText(".L." + Twine(CurrentFnSym->getName()) + ":");
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}
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bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
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const TargetData *TD = TM.getTargetData();
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bool isPPC64 = TD->getPointerSizeInBits() == 64;
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if (isPPC64 && !TOC.empty()) {
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// FIXME 64-bit SVR4: Use MCSection here?
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OutStreamer.EmitRawText(StringRef("\t.section\t\".toc\",\"aw\""));
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// FIXME: This is nondeterminstic!
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for (DenseMap<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(),
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E = TOC.end(); I != E; ++I) {
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OutStreamer.EmitLabel(I->second);
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OutStreamer.EmitRawText("\t.tc " + Twine(I->first->getName()) +
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"[TC]," + I->first->getName());
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}
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}
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return AsmPrinter::doFinalization(M);
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}
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void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) {
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static const char *const CPUDirectives[] = {
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"",
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"ppc",
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"ppc601",
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"ppc602",
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"ppc603",
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"ppc7400",
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"ppc750",
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"ppc970",
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"ppc64"
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};
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unsigned Directive = Subtarget.getDarwinDirective();
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if (Subtarget.isGigaProcessor() && Directive < PPC::DIR_970)
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Directive = PPC::DIR_970;
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if (Subtarget.hasAltivec() && Directive < PPC::DIR_7400)
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Directive = PPC::DIR_7400;
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if (Subtarget.isPPC64() && Directive < PPC::DIR_970)
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Directive = PPC::DIR_64;
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assert(Directive <= PPC::DIR_64 && "Directive out of range.");
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// FIXME: This is a total hack, finish mc'izing the PPC backend.
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if (OutStreamer.hasRawTextSupport())
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OutStreamer.EmitRawText("\t.machine " + Twine(CPUDirectives[Directive]));
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// Prime text sections so they are adjacent. This reduces the likelihood a
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// large data or debug section causes a branch to exceed 16M limit.
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const TargetLoweringObjectFileMachO &TLOFMacho =
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static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
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OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection());
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if (TM.getRelocationModel() == Reloc::PIC_) {
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OutStreamer.SwitchSection(
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OutContext.getMachOSection("__TEXT", "__picsymbolstub1",
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MCSectionMachO::S_SYMBOL_STUBS |
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MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
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32, SectionKind::getText()));
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} else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) {
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OutStreamer.SwitchSection(
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OutContext.getMachOSection("__TEXT","__symbol_stub1",
|
|
MCSectionMachO::S_SYMBOL_STUBS |
|
|
MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
|
|
16, SectionKind::getText()));
|
|
}
|
|
OutStreamer.SwitchSection(getObjFileLowering().getTextSection());
|
|
}
|
|
|
|
static MCSymbol *GetLazyPtr(MCSymbol *Sym, MCContext &Ctx) {
|
|
// Remove $stub suffix, add $lazy_ptr.
|
|
SmallString<128> TmpStr(Sym->getName().begin(), Sym->getName().end()-5);
|
|
TmpStr += "$lazy_ptr";
|
|
return Ctx.GetOrCreateSymbol(TmpStr.str());
|
|
}
|
|
|
|
static MCSymbol *GetAnonSym(MCSymbol *Sym, MCContext &Ctx) {
|
|
// Add $tmp suffix to $stub, yielding $stub$tmp.
|
|
SmallString<128> TmpStr(Sym->getName().begin(), Sym->getName().end());
|
|
TmpStr += "$tmp";
|
|
return Ctx.GetOrCreateSymbol(TmpStr.str());
|
|
}
|
|
|
|
void PPCDarwinAsmPrinter::
|
|
EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs) {
|
|
bool isPPC64 = TM.getTargetData()->getPointerSizeInBits() == 64;
|
|
|
|
const TargetLoweringObjectFileMachO &TLOFMacho =
|
|
static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
|
|
|
|
// .lazy_symbol_pointer
|
|
const MCSection *LSPSection = TLOFMacho.getLazySymbolPointerSection();
|
|
|
|
// Output stubs for dynamically-linked functions
|
|
if (TM.getRelocationModel() == Reloc::PIC_) {
|
|
const MCSection *StubSection =
|
|
OutContext.getMachOSection("__TEXT", "__picsymbolstub1",
|
|
MCSectionMachO::S_SYMBOL_STUBS |
|
|
MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
|
|
32, SectionKind::getText());
|
|
for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
|
|
OutStreamer.SwitchSection(StubSection);
|
|
EmitAlignment(4);
|
|
|
|
MCSymbol *Stub = Stubs[i].first;
|
|
MCSymbol *RawSym = Stubs[i].second.getPointer();
|
|
MCSymbol *LazyPtr = GetLazyPtr(Stub, OutContext);
|
|
MCSymbol *AnonSymbol = GetAnonSym(Stub, OutContext);
|
|
|
|
OutStreamer.EmitLabel(Stub);
|
|
OutStreamer.EmitSymbolAttribute(RawSym, MCSA_IndirectSymbol);
|
|
// FIXME: MCize this.
|
|
OutStreamer.EmitRawText(StringRef("\tmflr r0"));
|
|
OutStreamer.EmitRawText("\tbcl 20,31," + Twine(AnonSymbol->getName()));
|
|
OutStreamer.EmitLabel(AnonSymbol);
|
|
OutStreamer.EmitRawText(StringRef("\tmflr r11"));
|
|
OutStreamer.EmitRawText("\taddis r11,r11,ha16("+Twine(LazyPtr->getName())+
|
|
"-" + AnonSymbol->getName() + ")");
|
|
OutStreamer.EmitRawText(StringRef("\tmtlr r0"));
|
|
|
|
if (isPPC64)
|
|
OutStreamer.EmitRawText("\tldu r12,lo16(" + Twine(LazyPtr->getName()) +
|
|
"-" + AnonSymbol->getName() + ")(r11)");
|
|
else
|
|
OutStreamer.EmitRawText("\tlwzu r12,lo16(" + Twine(LazyPtr->getName()) +
|
|
"-" + AnonSymbol->getName() + ")(r11)");
|
|
OutStreamer.EmitRawText(StringRef("\tmtctr r12"));
|
|
OutStreamer.EmitRawText(StringRef("\tbctr"));
|
|
|
|
OutStreamer.SwitchSection(LSPSection);
|
|
OutStreamer.EmitLabel(LazyPtr);
|
|
OutStreamer.EmitSymbolAttribute(RawSym, MCSA_IndirectSymbol);
|
|
|
|
if (isPPC64)
|
|
OutStreamer.EmitRawText(StringRef("\t.quad dyld_stub_binding_helper"));
|
|
else
|
|
OutStreamer.EmitRawText(StringRef("\t.long dyld_stub_binding_helper"));
|
|
}
|
|
OutStreamer.AddBlankLine();
|
|
return;
|
|
}
|
|
|
|
const MCSection *StubSection =
|
|
OutContext.getMachOSection("__TEXT","__symbol_stub1",
|
|
MCSectionMachO::S_SYMBOL_STUBS |
|
|
MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
|
|
16, SectionKind::getText());
|
|
for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
|
|
MCSymbol *Stub = Stubs[i].first;
|
|
MCSymbol *RawSym = Stubs[i].second.getPointer();
|
|
MCSymbol *LazyPtr = GetLazyPtr(Stub, OutContext);
|
|
|
|
OutStreamer.SwitchSection(StubSection);
|
|
EmitAlignment(4);
|
|
OutStreamer.EmitLabel(Stub);
|
|
OutStreamer.EmitSymbolAttribute(RawSym, MCSA_IndirectSymbol);
|
|
OutStreamer.EmitRawText("\tlis r11,ha16(" + Twine(LazyPtr->getName()) +")");
|
|
if (isPPC64)
|
|
OutStreamer.EmitRawText("\tldu r12,lo16(" + Twine(LazyPtr->getName()) +
|
|
")(r11)");
|
|
else
|
|
OutStreamer.EmitRawText("\tlwzu r12,lo16(" + Twine(LazyPtr->getName()) +
|
|
")(r11)");
|
|
OutStreamer.EmitRawText(StringRef("\tmtctr r12"));
|
|
OutStreamer.EmitRawText(StringRef("\tbctr"));
|
|
OutStreamer.SwitchSection(LSPSection);
|
|
OutStreamer.EmitLabel(LazyPtr);
|
|
OutStreamer.EmitSymbolAttribute(RawSym, MCSA_IndirectSymbol);
|
|
|
|
if (isPPC64)
|
|
OutStreamer.EmitRawText(StringRef("\t.quad dyld_stub_binding_helper"));
|
|
else
|
|
OutStreamer.EmitRawText(StringRef("\t.long dyld_stub_binding_helper"));
|
|
}
|
|
|
|
OutStreamer.AddBlankLine();
|
|
}
|
|
|
|
|
|
bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
|
|
bool isPPC64 = TM.getTargetData()->getPointerSizeInBits() == 64;
|
|
|
|
// Darwin/PPC always uses mach-o.
|
|
const TargetLoweringObjectFileMachO &TLOFMacho =
|
|
static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
|
|
MachineModuleInfoMachO &MMIMacho =
|
|
MMI->getObjFileInfo<MachineModuleInfoMachO>();
|
|
|
|
MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetFnStubList();
|
|
if (!Stubs.empty())
|
|
EmitFunctionStubs(Stubs);
|
|
|
|
if (MAI->doesSupportExceptionHandling() && MMI) {
|
|
// Add the (possibly multiple) personalities to the set of global values.
|
|
// Only referenced functions get into the Personalities list.
|
|
const std::vector<const Function*> &Personalities = MMI->getPersonalities();
|
|
for (std::vector<const Function*>::const_iterator I = Personalities.begin(),
|
|
E = Personalities.end(); I != E; ++I) {
|
|
if (*I) {
|
|
MCSymbol *NLPSym = GetSymbolWithGlobalValueBase(*I, "$non_lazy_ptr");
|
|
MachineModuleInfoImpl::StubValueTy &StubSym =
|
|
MMIMacho.getGVStubEntry(NLPSym);
|
|
StubSym = MachineModuleInfoImpl::StubValueTy(Mang->getSymbol(*I), true);
|
|
}
|
|
}
|
|
}
|
|
|
|
// Output stubs for dynamically-linked functions.
|
|
Stubs = MMIMacho.GetGVStubList();
|
|
|
|
// Output macho stubs for external and common global variables.
|
|
if (!Stubs.empty()) {
|
|
// Switch with ".non_lazy_symbol_pointer" directive.
|
|
OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
|
|
EmitAlignment(isPPC64 ? 3 : 2);
|
|
|
|
for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
|
|
// L_foo$stub:
|
|
OutStreamer.EmitLabel(Stubs[i].first);
|
|
// .indirect_symbol _foo
|
|
MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
|
|
OutStreamer.EmitSymbolAttribute(MCSym.getPointer(), MCSA_IndirectSymbol);
|
|
|
|
if (MCSym.getInt())
|
|
// External to current translation unit.
|
|
OutStreamer.EmitIntValue(0, isPPC64 ? 8 : 4/*size*/, 0/*addrspace*/);
|
|
else
|
|
// Internal to current translation unit.
|
|
//
|
|
// When we place the LSDA into the TEXT section, the type info pointers
|
|
// need to be indirect and pc-rel. We accomplish this by using NLPs.
|
|
// However, sometimes the types are local to the file. So we need to
|
|
// fill in the value for the NLP in those cases.
|
|
OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(),
|
|
OutContext),
|
|
isPPC64 ? 8 : 4/*size*/, 0/*addrspace*/);
|
|
}
|
|
|
|
Stubs.clear();
|
|
OutStreamer.AddBlankLine();
|
|
}
|
|
|
|
Stubs = MMIMacho.GetHiddenGVStubList();
|
|
if (!Stubs.empty()) {
|
|
OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
|
|
EmitAlignment(isPPC64 ? 3 : 2);
|
|
|
|
for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
|
|
// L_foo$stub:
|
|
OutStreamer.EmitLabel(Stubs[i].first);
|
|
// .long _foo
|
|
OutStreamer.EmitValue(MCSymbolRefExpr::
|
|
Create(Stubs[i].second.getPointer(),
|
|
OutContext),
|
|
isPPC64 ? 8 : 4/*size*/, 0/*addrspace*/);
|
|
}
|
|
|
|
Stubs.clear();
|
|
OutStreamer.AddBlankLine();
|
|
}
|
|
|
|
// Funny Darwin hack: This flag tells the linker that no global symbols
|
|
// contain code that falls through to other global symbols (e.g. the obvious
|
|
// implementation of multiple entry points). If this doesn't occur, the
|
|
// linker can safely perform dead code stripping. Since LLVM never generates
|
|
// code that does this, it is always safe to set.
|
|
OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
|
|
|
|
return AsmPrinter::doFinalization(M);
|
|
}
|
|
|
|
/// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code
|
|
/// for a MachineFunction to the given output stream, in a format that the
|
|
/// Darwin assembler can deal with.
|
|
///
|
|
static AsmPrinter *createPPCAsmPrinterPass(TargetMachine &tm,
|
|
MCStreamer &Streamer) {
|
|
const PPCSubtarget *Subtarget = &tm.getSubtarget<PPCSubtarget>();
|
|
|
|
if (Subtarget->isDarwin())
|
|
return new PPCDarwinAsmPrinter(tm, Streamer);
|
|
return new PPCLinuxAsmPrinter(tm, Streamer);
|
|
}
|
|
|
|
static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
|
|
unsigned SyntaxVariant,
|
|
const MCAsmInfo &MAI) {
|
|
return new PPCInstPrinter(MAI, SyntaxVariant);
|
|
}
|
|
|
|
|
|
// Force static initialization.
|
|
extern "C" void LLVMInitializePowerPCAsmPrinter() {
|
|
TargetRegistry::RegisterAsmPrinter(ThePPC32Target, createPPCAsmPrinterPass);
|
|
TargetRegistry::RegisterAsmPrinter(ThePPC64Target, createPPCAsmPrinterPass);
|
|
|
|
TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter);
|
|
TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter);
|
|
}
|