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1e730f96ac
If the requested SGPR was not actually aligned, it was accepted and rounded down instead of rejected. Also fix an assert if the range is an invalid size. llvm-svn: 252009
63 lines
1.7 KiB
ArmAsm
63 lines
1.7 KiB
ArmAsm
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s
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// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s
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s_add_i32 s104, s0, s1
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// CHECK: error: invalid operand for instruction
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s_add_i32 s105, s0, s1
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// CHECK: error: invalid operand for instruction
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v_add_i32 v256, v0, v1
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// CHECK: error: invalid operand for instruction
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v_add_i32 v257, v0, v1
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// CHECK: error: invalid operand for instruction
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s_mov_b64 s[0:17], -1
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// CHECK: error: invalid operand for instruction
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s_mov_b64 s[103:104], -1
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// CHECK: error: invalid operand for instruction
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s_mov_b64 s[104:105], -1
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// CHECK: error: invalid operand for instruction
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s_load_dwordx4 s[102:105], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx4 s[104:108], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx4 s[108:112], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx4 s[1:4], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx4 s[1:4], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx8 s[104:111], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx8 s[100:107], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx8 s[108:115], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx16 s[92:107], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx16 s[96:111], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx16 s[100:115], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx16 s[104:119], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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s_load_dwordx16 s[108:123], s[2:3], s4
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// CHECK: error: invalid operand for instruction
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