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5fe4f881c1
Rather than using the AdditionalPredicates mechanism to guard the microMIPS instructions, use the existing predicates to properly guard those instructions. This also resolves a case where an instruction pattern was incorrectly available for microMIPS32R6, which caused a register allocation failure as the registers specified in the pattern were not available. Reviewers: nitesh.jain, atanasyan Differential Revision: https://reviews.llvm.org/D38451 llvm-svn: 315362
85 lines
3.7 KiB
LLVM
85 lines
3.7 KiB
LLVM
; Check whether nmadd/nmsub instructions are properly generated
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; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM
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; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+fp64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM
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; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=micromips -enable-no-nans-fp-math -asm-show-inst | FileCheck %s -check-prefixes=ALL,CHECK-NM,CHECK-MM
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; RUN: llc < %s -march=mips64el -mcpu=mips64 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM-64
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; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM-64
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; RUN: llc < %s -march=mips64el -mcpu=mips4 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM-64
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; RUN: llc < %s -march=mipsel -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM
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; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM
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; RUN: llc < %s -march=mips64el -mcpu=mips3 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM-64
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; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -mattr=micromips -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NOT-NM
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; RUN: llc < %s -march=mipsel -mcpu=mips32r3 -mattr=micromips -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,CHECK-NM
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define float @add1(float %f, float %g, float %h) local_unnamed_addr #0 {
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entry:
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; ALL-LABEL: add1
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; CHECK-NM-64: nmadd.s $f0, $f14, $f12, $f13
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; CHECK-NM: nmadd.s $f0, $f0, $f12, $f14
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; CHECK-MM: NMADD_S_MM
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; CHECK-NOT-NM-64 mul.s $f0, $f12, $f13
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; CHECK-NOT-NM-64: neg.s $f0, $f0
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; CHECK-NOT-NM: mul.s $f0, $f12, $f14
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; CHECK-NOT-NM: neg.s $f0, $f0
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%mul = fmul nnan float %f, %g
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%add = fadd nnan float %mul, %h
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%sub = fsub nnan float -0.000000e+00, %add
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ret float %sub
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}
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define double @add2(double %f, double %g, double %h) local_unnamed_addr #0 {
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entry:
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; ALL-LABEL: add2
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; CHECK-NM-64: nmadd.d $f0, $f14, $f12, $f13
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; CHECK-NM: nmadd.d $f0, $f0, $f12, $f14
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; CHECK-MM: NMADD_D32_MM
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; CHECK-NOT-NM-64 mul.d $f0, $f12, $f13
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; CHECK-NOT-NM-64: neg.d $f0, $f0
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; CHECK-NOT-NM: mul.d $f0, $f12, $f14
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; CHECK-NOT-NM: neg.d $f0, $f0
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%mul = fmul nnan double %f, %g
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%add = fadd nnan double %mul, %h
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%sub = fsub nnan double -0.000000e+00, %add
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ret double %sub
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}
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define float @sub1(float %f, float %g, float %h) local_unnamed_addr #0 {
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entry:
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; ALL-LABEL: sub1
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; CHECK-NM-64: nmsub.s $f0, $f14, $f12, $f13
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; CHECK-NM: nmsub.s $f0, $f0, $f12, $f14
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; CHECK-MM: NMSUB_S_MM
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; CHECK-NOT-NM-64 mul.s $f0, $f12, $f13
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; CHECK-NOT-NM-64: neg.s $f0, $f0
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; CHECK-NOT-NM: mul.s $f0, $f12, $f14
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; CHECK-NOT-NM: neg.s $f0, $f0
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%mul = fmul nnan float %f, %g
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%sub = fsub nnan float %mul, %h
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%sub1 = fsub nnan float -0.000000e+00, %sub
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ret float %sub1
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}
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define double @sub2(double %f, double %g, double %h) local_unnamed_addr #0 {
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entry:
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; ALL-LABEL: sub2
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; CHECK-NM-64: nmsub.d $f0, $f14, $f12, $f13
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; CHECK-NM: nmsub.d $f0, $f0, $f12, $f14
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; CHECK-MM: NMSUB_D32_MM
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; CHECK-NOT-NM-64 mul.d $f0, $f12, $f13
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; CHECK-NOT-NM-64: neg.d $f0, $f0
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; CHECK-NOT-NM: mul.d $f0, $f12, $f14
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; CHECK-NOT-NM: neg.d $f0, $f0
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%mul = fmul nnan double %f, %g
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%sub = fsub nnan double %mul, %h
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%sub1 = fsub nnan double -0.000000e+00, %sub
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ret double %sub1
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}
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