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1c60305666
This patch fixes load/store instructions to handle less common cases like "asr #32", "rrx" properly throughout the MC layer. Patch by Chris Lidbury. llvm-svn: 164455
77 lines
3.1 KiB
ArmAsm
77 lines
3.1 KiB
ArmAsm
@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7 -show-encoding < %s | FileCheck %s
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ldr r0, [r0, r0]
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ldr r0, [r0, r0, lsr #32]
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ldr r0, [r0, r0, lsr #16]
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ldr r0, [r0, r0, lsl #0]
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ldr r0, [r0, r0, lsl #16]
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ldr r0, [r0, r0, asr #32]
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ldr r0, [r0, r0, asr #16]
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ldr r0, [r0, r0, rrx]
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ldr r0, [r0, r0, ror #16]
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@ CHECK: ldr r0, [r0, r0] @ encoding: [0x00,0x00,0x90,0xe7]
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@ CHECK: ldr r0, [r0, r0, lsr #32] @ encoding: [0x20,0x00,0x90,0xe7]
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@ CHECK: ldr r0, [r0, r0, lsr #16] @ encoding: [0x20,0x08,0x90,0xe7]
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@ CHECK: ldr r0, [r0, r0] @ encoding: [0x00,0x00,0x90,0xe7]
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@ CHECK: ldr r0, [r0, r0, lsl #16] @ encoding: [0x00,0x08,0x90,0xe7]
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@ CHECK: ldr r0, [r0, r0, asr #32] @ encoding: [0x40,0x00,0x90,0xe7]
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@ CHECK: ldr r0, [r0, r0, asr #16] @ encoding: [0x40,0x08,0x90,0xe7]
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@ CHECK: ldr r0, [r0, r0, rrx] @ encoding: [0x60,0x00,0x90,0xe7]
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@ CHECK: ldr r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x90,0xe7]
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pld [r0, r0]
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pld [r0, r0, lsr #32]
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pld [r0, r0, lsr #16]
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pld [r0, r0, lsl #0]
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pld [r0, r0, lsl #16]
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pld [r0, r0, asr #32]
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pld [r0, r0, asr #16]
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pld [r0, r0, rrx]
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pld [r0, r0, ror #16]
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@ CHECK: [r0, r0] @ encoding: [0x00,0xf0,0xd0,0xf7]
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@ CHECK: [r0, r0, lsr #32] @ encoding: [0x20,0xf0,0xd0,0xf7]
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@ CHECK: [r0, r0, lsr #16] @ encoding: [0x20,0xf8,0xd0,0xf7]
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@ CHECK: [r0, r0] @ encoding: [0x00,0xf0,0xd0,0xf7]
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@ CHECK: [r0, r0, lsl #16] @ encoding: [0x00,0xf8,0xd0,0xf7]
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@ CHECK: [r0, r0, asr #32] @ encoding: [0x40,0xf0,0xd0,0xf7]
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@ CHECK: [r0, r0, asr #16] @ encoding: [0x40,0xf8,0xd0,0xf7]
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@ CHECK: [r0, r0, rrx] @ encoding: [0x60,0xf0,0xd0,0xf7]
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@ CHECK: [r0, r0, ror #16] @ encoding: [0x60,0xf8,0xd0,0xf7]
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str r0, [r0, r0]
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str r0, [r0, r0, lsr #32]
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str r0, [r0, r0, lsr #16]
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str r0, [r0, r0, lsl #0]
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str r0, [r0, r0, lsl #16]
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str r0, [r0, r0, asr #32]
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str r0, [r0, r0, asr #16]
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str r0, [r0, r0, rrx]
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str r0, [r0, r0, ror #16]
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@ CHECK: str r0, [r0, r0] @ encoding: [0x00,0x00,0x80,0xe7]
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@ CHECK: str r0, [r0, r0, lsr #32] @ encoding: [0x20,0x00,0x80,0xe7]
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@ CHECK: str r0, [r0, r0, lsr #16] @ encoding: [0x20,0x08,0x80,0xe7]
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@ CHECK: str r0, [r0, r0] @ encoding: [0x00,0x00,0x80,0xe7]
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@ CHECK: str r0, [r0, r0, lsl #16] @ encoding: [0x00,0x08,0x80,0xe7]
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@ CHECK: str r0, [r0, r0, asr #32] @ encoding: [0x40,0x00,0x80,0xe7]
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@ CHECK: str r0, [r0, r0, asr #16] @ encoding: [0x40,0x08,0x80,0xe7]
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@ CHECK: str r0, [r0, r0, rrx] @ encoding: [0x60,0x00,0x80,0xe7]
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@ CHECK: str r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x80,0xe7]
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@ Uses printAddrMode2OffsetOperand(), used by LDRBT_POST_IMM LDRBT_POST_REG
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@ LDRB_POST_IMM LDRB_POST_REG LDRT_POST_IMM LDRT_POST_REG LDR_POST_IMM
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@ LDR_POST_REG STRBT_POST_IMM STRBT_POST_REG STRB_POST_IMM STRB_POST_REG
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@ STRT_POST_IMM STRT_POST_REG STR_POST_IMM STR_POST_REG
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ldr r0, [r1], r2, rrx
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ldr r3, [r4], r5, ror #0
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str r6, [r7], r8, lsl #0
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str r9, [r10], r11
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@ CHECK: ldr r0, [r1], r2, rrx @ encoding: [0x62,0x00,0x91,0xe6]
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@ CHECK: ldr r3, [r4], r5 @ encoding: [0x05,0x30,0x94,0xe6]
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@ CHECK: str r6, [r7], r8 @ encoding: [0x08,0x60,0x87,0xe6]
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@ CHECK: str r9, [r10], r11 @ encoding: [0x0b,0x90,0x8a,0xe6]
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