1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 02:52:53 +02:00
llvm-mirror/test/CodeGen/Mips/Fast-ISel/shift.ll
Daniel Sanders aed2e151eb [llvm-objdump] Support detection of feature bits from the object and implement this for Mips.
Summary:
The Mips implementation only covers the feature bits described by the ELF
e_flags so far. Mips stores additional feature bits such as MSA in the
.MIPS.abiflags section.

Also fixed a small bug this revealed where microMIPS wouldn't add the
EF_MIPS_MICROMIPS flag when using -filetype=obj.

Reviewers: echristo, rafael

Subscribers: rafael, mehdi_amini, dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D21125

llvm-svn: 272880
2016-06-16 09:17:03 +00:00

25 lines
626 B
LLVM

; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -fast-isel=true -filetype=obj %s -o - \
; RUN: | llvm-objdump -d - | FileCheck %s
; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used.
%struct.s = type { [4 x i8], i32 }
define i32 @main() nounwind uwtable {
entry:
%foo = alloca %struct.s, align 4
%0 = bitcast %struct.s* %foo to i32*
%bf.load = load i32, i32* %0, align 4
%bf.lshr = lshr i32 %bf.load, 2
%cmp = icmp ne i32 %bf.lshr, 2
br i1 %cmp, label %if.then, label %if.end
if.then:
unreachable
if.end:
ret i32 0
}
; CHECK: srl ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}}