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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
38 lines
1.5 KiB
LLVM
38 lines
1.5 KiB
LLVM
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=static
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@y = global double -1.450000e+00, align 8
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@x = common global double 0.000000e+00, align 8
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@y1 = common global float 0.000000e+00, align 4
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@x1 = common global float 0.000000e+00, align 4
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; Function Attrs: nounwind optsize
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define i32 @main() #0 {
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entry:
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%0 = load double, double* @y, align 8
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%call = tail call double @fabs(double %0) #2
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store double %call, double* @x, align 8
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; static-NOT: .ent __call_stub_fp_fabs
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; static-NOT: jal fabs
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%1 = load float, float* @y1, align 4
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%call2 = tail call float @fabsf(float %1) #2
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store float %call2, float* @x1, align 4
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; static-NOT: .ent __call_stub_fp_fabsf
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; static-NOT: jal fabsf
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ret i32 0
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}
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; Function Attrs: nounwind optsize readnone
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declare double @fabs(double) #1
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declare float @fabsf(float) #1
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attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
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attributes #1 = { nounwind optsize readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
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attributes #2 = { nounwind optsize readnone }
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