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4a1ffa80e1
Also improve assembler parser register validation for .seh_ directives. This requires moving X86-specific seh directive handling into the x86 backend, which addresses some assembler FIXMEs. Differential Revision: https://reviews.llvm.org/D66625 llvm-svn: 370533
84 lines
2.8 KiB
ArmAsm
84 lines
2.8 KiB
ArmAsm
// This test checks the alignment and padding of the unwind info.
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// RUN: llvm-mc -triple x86_64-pc-win32 -filetype=obj %s | llvm-readobj -S --sd --sr -u | FileCheck %s
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// CHECK: Sections [
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// CHECK: Section {
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// CHECK: Name: .xdata
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// CHECK: RawDataSize: 16
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// CHECK: RelocationCount: 1
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// CHECK: Characteristics [
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// CHECK-NEXT: ALIGN_4BYTES
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// CHECK-NEXT: CNT_INITIALIZED_DATA
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// CHECK-NEXT: MEM_READ
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// CHECK-NEXT: ]
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// CHECK: Relocations [
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// CHECK-NEXT: [[HandlerDisp:0x[A-F0-9]+]] IMAGE_REL_AMD64_ADDR32NB __C_specific_handler
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// CHECK-NEXT: ]
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// CHECK: SectionData (
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// CHECK-NEXT: 0000: 19000200 04D002C0 00000000 BEBAFECA
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// CHECK-NEXT: )
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// CHECK-NEXT: }
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// CHECK-NEXT: Section {
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// CHECK: Name: .pdata
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// CHECK: RawDataSize: 12
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// CHECK: RelocationCount: 3
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// CHECK: Characteristics [
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// CHECK-NEXT: IMAGE_SCN_ALIGN_4BYTES
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// CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA
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// CHECK-NEXT: IMAGE_SCN_MEM_READ
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// CHECK-NEXT: ]
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// CHECK: Relocations [
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// CHECK-NEXT: [[BeginDisp:0x[A-F0-9]+]] IMAGE_REL_AMD64_ADDR32NB func
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// CHECK-NEXT: [[EndDisp:0x[A-F0-9]+]] IMAGE_REL_AMD64_ADDR32NB func
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// CHECK-NEXT: [[UnwindDisp:0x[A-F0-9]+]] IMAGE_REL_AMD64_ADDR32NB .xdata
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// CHECK-NEXT: ]
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// CHECK: SectionData (
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// CHECK-NEXT: 0000: FCFFFFFF 05000000 00000000
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// CHECK-NEXT: )
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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// CHECK: UnwindInformation [
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// CHECK-NEXT: RuntimeFunction {
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// CHECK-NEXT: StartAddress: func {{(\+0x[A-F0-9]+ )?}}([[BeginDisp]])
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// CHECK-NEXT: EndAddress: func {{(\+0x[A-F0-9]+ )?}}([[EndDisp]])
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// CHECK-NEXT: UnwindInfoAddress: .xdata {{(\+0x[A-F0-9]+ )?}}([[UnwindDisp]])
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// CHECK-NEXT: UnwindInfo {
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// CHECK-NEXT: Version: 1
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// CHECK-NEXT: Flags [
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// CHECK-NEXT: ExceptionHandler
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// CHECK-NEXT: TerminateHandler
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// CHECK-NEXT: ]
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// CHECK-NEXT: PrologSize: 0
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// CHECK-NEXT: FrameRegister: -
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// CHECK-NEXT: FrameOffset: -
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// CHECK-NEXT: UnwindCodeCount: 2
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// CHECK-NEXT: UnwindCodes [
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// CHECK-NEXT: 0x04: PUSH_NONVOL reg=R13
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// CHECK-NEXT: 0x02: PUSH_NONVOL reg=R12
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// CHECK-NEXT: ]
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// CHECK-NEXT: Handler: __C_specific_handler ([[HandlerDisp]])
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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// Generates two unwind codes.
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// Requires no padding of the unwind code array.
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.globl func
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.def func; .scl 2; .type 32; .endef
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.seh_proc func
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push %r12
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.seh_pushreg %r12
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push %r13
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.seh_pushreg %r13
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.seh_handler __C_specific_handler, @except, @unwind
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.seh_handlerdata
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.long 0xcafebabe
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.text
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.seh_endprologue
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func:
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pop %r13
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pop %r12
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ret
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.seh_endproc
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