Simon Pilgrim f2c8d69df9 [DAG] Fold select(cond,binop(x,y),binop(x,z)) -> binop(x,select(cond,y,z)) ... Similar to the folds performed in InstCombinerImpl::foldSelectOpOp, this attempts to push a select further up to help merge a pair of binops. I'm primarily interested in select(cond,add(x,y),add(x,z)) folds to help expose pointer math (see https://bugs.llvm.org/show_bug.cgi?id=51069 etc.) but I've tried to use the more generic isBinOp(). Differential Revision: https://reviews.llvm.org/D106058		2021-07-15 16:08:30 +01:00
..
CMakeLists.txt	llvmbuildectomy - replace llvm-build by plain cmake	2020-11-13 10:35:24 +01:00
DAGCombiner.cpp	[DAG] Fold select(cond,binop(x,y),binop(x,z)) -> binop(x,select(cond,y,z))	2021-07-15 16:08:30 +01:00
FastISel.cpp	[OpaquePtr][ISel] Use ArgListEntry::IndirectType more	2021-07-12 21:14:35 -07:00
FunctionLoweringInfo.cpp	[NFC] Wisely nest dyn_cast in FunctionLoweringInfo	2021-03-16 10:22:44 +01:00
InstrEmitter.cpp	[DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations	2021-07-06 18:31:38 +01:00
InstrEmitter.h	[DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations	2021-07-06 18:31:38 +01:00
LegalizeDAG.cpp	[TargetLowering][AArch64][SVE] Take into account accessed type when clamping address	2021-06-30 13:30:18 +01:00
LegalizeFloatTypes.cpp	Update @llvm.powi to handle different int sizes for the exponent	2021-06-17 09:38:28 +02:00
LegalizeIntegerTypes.cpp	[SelectionDAG][RISCV] Support @llvm.vscale.i64() on 32-bit targets.	2021-07-12 14:53:42 -07:00
LegalizeTypes.cpp	[SelectionDAG] Use range-based for loops (NFC)	2021-02-09 22:14:30 -08:00
LegalizeTypes.h	[SelectionDAG][RISCV] Support @llvm.vscale.i64() on 32-bit targets.	2021-07-12 14:53:42 -07:00
LegalizeTypesGeneric.cpp	[CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize	2020-08-11 12:17:10 +01:00
LegalizeVectorOps.cpp	[AArch64][SVE] Add support for fixed length MSCATTER/MGATHER	2021-07-01 12:13:59 +01:00
LegalizeVectorTypes.cpp	Revert "[llvm] Add enum iteration to Sequence"	2021-07-13 16:44:42 +00:00
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp	[DebugInstrRef] Create DBG_INSTR_REFs in SelectionDAG	2020-10-14 14:24:08 +01:00
ScheduleDAGRRList.cpp	Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"	2020-09-21 13:33:05 +02:00
ScheduleDAGSDNodes.cpp	[DebugInfo] Fix crash when emitting an invalidated SDDbgValue	2021-05-07 13:13:56 +01:00
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp	[SelectionDAG] Use range-based for loops (NFC)	2021-02-09 22:14:30 -08:00
SDNodeDbgValue.h	[DAG] Ensure all SD classes consistently return a const reference with getDebugLoc(). NFCI.	2021-05-07 14:48:23 +01:00
SelectionDAG.cpp	[SelectionDAG] Add an overload of getStepVector that assumes step 1.	2021-07-14 11:37:01 -07:00
SelectionDAGAddressAnalysis.cpp	[SelectionDAG] Avoid aliasing analysis if the object size is unknown.	2020-11-25 06:13:37 +08:00
SelectionDAGBuilder.cpp	[SelectionDAG] Add an overload of getStepVector that assumes step 1.	2021-07-14 11:37:01 -07:00
SelectionDAGBuilder.h	SwiftTailCC: teach verifier musttail rules applicable to this CC.	2021-05-28 11:12:00 +01:00
SelectionDAGDumper.cpp	[ISel] Port AArch64 SABD and UABD to DAGCombine	2021-06-26 19:34:16 +01:00
SelectionDAGISel.cpp	[DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations	2021-07-06 18:31:38 +01:00
SelectionDAGPrinter.cpp	[SelectionDAG] Drop unnecessary const from a return type (NFC)	2021-02-07 09:49:33 -08:00
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp	[Statepoint Lowering] Cleanup: remove unused option statepoint-always-spill-base.	2021-05-18 12:15:15 +07:00
StatepointLowering.h	More precisely type code used for gc.relocate assertions [nfc]	2021-04-06 11:27:36 -07:00
TargetLowering.cpp	[OpaquePtr] Use ArgListEntry::IndirectType for lowering ABI attributes	2021-07-07 14:58:38 -07:00