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llvm-mirror/test/CodeGen/ARM/vargs_align.ll
Tim Northover 5e9ed07177 ARM: simplify and extend byval handling
The main issue being fixed here is that APCS targets handling a "byval align N"
parameter with N > 4 were miscounting what objects were where on the stack,
leading to FrameLowering setting the frame pointer incorrectly and clobbering
the stack.

But byval handling had grown over many years, and had multiple layers of cruft
trying to compensate for each other and calculate padding correctly. This only
really needs to be done once, in the HandleByVal function. Elsewhere should
just do what it's told by that call.

I also stripped out unnecessary APCS/AAPCS distinctions (now that Clang emits
byvals with the correct C ABI alignment), which simplified HandleByVal.

rdar://20095672

llvm-svn: 231959
2015-03-11 18:54:22 +00:00

30 lines
850 B
LLVM

; RUN: llc < %s -mtriple=armv7-linux-gnueabihf | FileCheck %s -check-prefix=EABI
; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | FileCheck %s -check-prefix=OABI
define i32 @f(i32 %a, ...) {
entry:
%a_addr = alloca i32 ; <i32*> [#uses=1]
%retval = alloca i32, align 4 ; <i32*> [#uses=2]
%tmp = alloca i32, align 4 ; <i32*> [#uses=2]
store i32 %a, i32* %a_addr
store i32 0, i32* %tmp
%tmp1 = load i32, i32* %tmp ; <i32> [#uses=1]
store i32 %tmp1, i32* %retval
call void @llvm.va_start(i8* null)
call void asm sideeffect "", "~{d8}"()
br label %return
return: ; preds = %entry
%retval2 = load i32, i32* %retval ; <i32> [#uses=1]
ret i32 %retval2
; EABI: add sp, sp, #16
; EABI: vpop {d8}
; EABI: add sp, sp, #4
; EABI: add sp, sp, #12
; OABI: add sp, sp, #12
; OABI: add sp, sp, #12
}
declare void @llvm.va_start(i8*) nounwind