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e9061eb73e
This is the first step toward supporting shrink-wrapping for this target.
The changes could be summarized by these items:
- Expand the tail-call return as part of the expand pseudo pass.
- Get rid of the assumptions that the epilogue is the exit block:
* Do not assume which registers are free in the epilogue. (This indirectly
improve the lowering of the code for the segmented stacks, see the test
cases.)
* Take into account that the basic block can be empty.
Related to <rdar://problem/20821730>
llvm-svn: 242714
48 lines
2.0 KiB
LLVM
48 lines
2.0 KiB
LLVM
; RUN: llc -mtriple=thumb-eabi %s -o /dev/null
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; RUN: llc -mtriple=thumb-linux %s -o - | FileCheck %s
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; RUN: llc -mtriple=thumb-darwin %s -o - | FileCheck %s
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@str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
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define void @f(i32 %a, ...) {
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entry:
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; Check that space is reserved above the pushed lr for variadic argument
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; registers to be stored in.
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; CHECK: sub sp, #[[IMM:[0-9]+]]
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; CHECK: push
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%va = alloca i8*, align 4 ; <i8**> [#uses=4]
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%va.upgrd.1 = bitcast i8** %va to i8* ; <i8*> [#uses=1]
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call void @llvm.va_start( i8* %va.upgrd.1 )
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br label %bb
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bb: ; preds = %bb, %entry
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%a_addr.0 = phi i32 [ %a, %entry ], [ %tmp5, %bb ] ; <i32> [#uses=2]
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%tmp = load volatile i8*, i8** %va ; <i8*> [#uses=2]
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%tmp2 = getelementptr i8, i8* %tmp, i32 4 ; <i8*> [#uses=1]
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store volatile i8* %tmp2, i8** %va
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%tmp5 = add i32 %a_addr.0, -1 ; <i32> [#uses=1]
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%tmp.upgrd.2 = icmp eq i32 %a_addr.0, 1 ; <i1> [#uses=1]
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br i1 %tmp.upgrd.2, label %bb7, label %bb
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bb7: ; preds = %bb
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%tmp3 = bitcast i8* %tmp to i32* ; <i32*> [#uses=1]
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%tmp.upgrd.3 = load i32, i32* %tmp3 ; <i32> [#uses=1]
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%tmp10 = call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @str, i32 0, i64 0), i32 %tmp.upgrd.3 ) ; <i32> [#uses=0]
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%va.upgrd.4 = bitcast i8** %va to i8* ; <i8*> [#uses=1]
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call void @llvm.va_end( i8* %va.upgrd.4 )
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ret void
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; The return sequence should pop the lr to r0-3, recover the stack space used to
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; store variadic argument registers, then return via r3. Possibly there is a pop
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; before this, but only if the function happened to use callee-saved registers.
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; CHECK: pop {[[POP_REG:r[0-3]]]}
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; CHECK: add sp, #[[IMM]]
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; CHECK: bx [[POP_REG]]
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}
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declare void @llvm.va_start(i8*)
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declare i32 @printf(i8*, ...)
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declare void @llvm.va_end(i8*)
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