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ed3c27bd7d
Author: milena.vujosevic.janicic Reviewers: dsanders Differential Revision: http://reviews.llvm.org/D17373 llvm-svn: 262725
24 lines
595 B
LLVM
24 lines
595 B
LLVM
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
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; RUN: -relocation-model=pic -O3 < %s | FileCheck %s
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; RUN: llc -O0 -march=mips -mcpu=mips32r2 -mattr=+micromips \
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; RUN: -asm-show-inst < %s | FileCheck %s
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; Branch instruction added to enable FastISel::selectOperator
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; to select OR instruction
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define i32 @f1(i32 signext %a, i32 signext %b) {
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; CHECK-LABEL: f1
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; CHECK-NOT: OR16_MMR6
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%1 = or i32 %a, %b
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br label %b1
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b1:
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ret i32 %1
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}
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define i32 @f2(i32 signext %a, i32 signext %b) {
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entry:
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; CHECK-LABEL: f2
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; CHECK: or16
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%0 = or i32 %a, %b
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ret i32 %0
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}
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