mirror of
https://github.com/RPCS3/llvm-mirror.git
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e3b33eadce
Summary: This change permits scalar bfloats to be loaded, stored, moved and used as function call arguments and return values, whenever the bf16 feature is supported by the subtarget. Previously that was only supported in the presence of the fullfp16 feature, because the code generation strategy depended on instructions from that extension. This change adds alternative code generation strategies so that those operations can be done even without fullfp16. The strategy for loads and stores is to replace VLDRH/VSTRH with integer LDRH/STRH plus a move between register classes. I've written isel patterns for those, conditional on //not// having the fullfp16 feature (so that in the fullfp16 case, the existing patterns will still be used). For function arguments and returns, instead of writing isel patterns to match `VMOVhr` and `VMOVrh`, I've avoided generating those SDNodes in the first place, by factoring out the code that constructs them into helper functions `MoveToHPR` and `MoveFromHPR` which have a fallback for non-fullfp16 subtargets. The current output code is not especially pretty: in the new test file you can see unnecessary store/load pairs implementing no-op bitcasts, and lots of pointless moves back and forth between FP registers and GPRs. But it at least works, which is an improvement on the previous situation. Reviewers: dmgreen, SjoerdMeijer, stuij, chill, miyuki, labrinea Reviewed By: dmgreen, labrinea Subscribers: labrinea, kristof.beyls, hiraditya, danielkiss, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D82372
222 lines
14 KiB
TableGen
222 lines
14 KiB
TableGen
//===-- ARMPredicates.td - ARM Instruction Predicates ------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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def HasV4T : Predicate<"Subtarget->hasV4TOps()">,
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AssemblerPredicate<(all_of HasV4TOps), "armv4t">;
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def NoV4T : Predicate<"!Subtarget->hasV4TOps()">;
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def HasV5T : Predicate<"Subtarget->hasV5TOps()">,
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AssemblerPredicate<(all_of HasV5TOps), "armv5t">;
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def NoV5T : Predicate<"!Subtarget->hasV5TOps()">;
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def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">,
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AssemblerPredicate<(all_of HasV5TEOps), "armv5te">;
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def HasV6 : Predicate<"Subtarget->hasV6Ops()">,
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AssemblerPredicate<(all_of HasV6Ops), "armv6">;
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def NoV6 : Predicate<"!Subtarget->hasV6Ops()">;
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def HasV6M : Predicate<"Subtarget->hasV6MOps()">,
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AssemblerPredicate<(all_of HasV6MOps),
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"armv6m or armv6t2">;
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def HasV8MBaseline : Predicate<"Subtarget->hasV8MBaselineOps()">,
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AssemblerPredicate<(all_of HasV8MBaselineOps),
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"armv8m.base">;
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def HasV8MMainline : Predicate<"Subtarget->hasV8MMainlineOps()">,
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AssemblerPredicate<(all_of HasV8MMainlineOps),
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"armv8m.main">;
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def HasV8_1MMainline : Predicate<"Subtarget->hasV8_1MMainlineOps()">,
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AssemblerPredicate<(all_of HasV8_1MMainlineOps),
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"armv8.1m.main">;
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def HasMVEInt : Predicate<"Subtarget->hasMVEIntegerOps()">,
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AssemblerPredicate<(all_of HasMVEIntegerOps),
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"mve">;
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def HasMVEFloat : Predicate<"Subtarget->hasMVEFloatOps()">,
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AssemblerPredicate<(all_of HasMVEFloatOps),
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"mve.fp">;
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def HasCDE : Predicate<"Subtarget->hasCDEOps()">,
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AssemblerPredicate<(all_of HasCDEOps),
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"cde">;
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def HasFPRegs : Predicate<"Subtarget->hasFPRegs()">,
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AssemblerPredicate<(all_of FeatureFPRegs),
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"fp registers">;
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def HasFPRegs16 : Predicate<"Subtarget->hasFPRegs16()">,
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AssemblerPredicate<(all_of FeatureFPRegs16),
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"16-bit fp registers">;
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def HasNoFPRegs16 : Predicate<"!Subtarget->hasFPRegs16()">,
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AssemblerPredicate<(all_of (not FeatureFPRegs16)),
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"16-bit fp registers">;
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def HasFPRegs64 : Predicate<"Subtarget->hasFPRegs64()">,
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AssemblerPredicate<(all_of FeatureFPRegs64),
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"64-bit fp registers">;
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def HasFPRegsV8_1M : Predicate<"Subtarget->hasFPRegs() && Subtarget->hasV8_1MMainlineOps()">,
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AssemblerPredicate<(all_of FeatureFPRegs, HasV8_1MMainlineOps),
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"armv8.1m.main with FP or MVE">;
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def HasV6T2 : Predicate<"Subtarget->hasV6T2Ops()">,
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AssemblerPredicate<(all_of HasV6T2Ops), "armv6t2">;
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def NoV6T2 : Predicate<"!Subtarget->hasV6T2Ops()">;
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def HasV6K : Predicate<"Subtarget->hasV6KOps()">,
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AssemblerPredicate<(all_of HasV6KOps), "armv6k">;
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def NoV6K : Predicate<"!Subtarget->hasV6KOps()">;
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def HasV7 : Predicate<"Subtarget->hasV7Ops()">,
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AssemblerPredicate<(all_of HasV7Ops), "armv7">;
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def HasV8 : Predicate<"Subtarget->hasV8Ops()">,
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AssemblerPredicate<(all_of HasV8Ops), "armv8">;
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def PreV8 : Predicate<"!Subtarget->hasV8Ops()">,
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AssemblerPredicate<(all_of (not HasV8Ops)), "armv7 or earlier">;
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def HasV8_1a : Predicate<"Subtarget->hasV8_1aOps()">,
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AssemblerPredicate<(all_of HasV8_1aOps), "armv8.1a">;
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def HasV8_2a : Predicate<"Subtarget->hasV8_2aOps()">,
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AssemblerPredicate<(all_of HasV8_2aOps), "armv8.2a">;
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def HasV8_3a : Predicate<"Subtarget->hasV8_3aOps()">,
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AssemblerPredicate<(all_of HasV8_3aOps), "armv8.3a">;
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def HasV8_4a : Predicate<"Subtarget->hasV8_4aOps()">,
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AssemblerPredicate<(all_of HasV8_4aOps), "armv8.4a">;
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def HasV8_5a : Predicate<"Subtarget->hasV8_5aOps()">,
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AssemblerPredicate<(all_of HasV8_5aOps), "armv8.5a">;
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def HasV8_6a : Predicate<"Subtarget->hasV8_6aOps()">,
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AssemblerPredicate<(all_of HasV8_6aOps), "armv8.6a">;
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def NoVFP : Predicate<"!Subtarget->hasVFP2Base()">;
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def HasVFP2 : Predicate<"Subtarget->hasVFP2Base()">,
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AssemblerPredicate<(all_of FeatureVFP2_SP), "VFP2">;
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def HasVFP3 : Predicate<"Subtarget->hasVFP3Base()">,
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AssemblerPredicate<(all_of FeatureVFP3_D16_SP), "VFP3">;
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def HasVFP4 : Predicate<"Subtarget->hasVFP4Base()">,
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AssemblerPredicate<(all_of FeatureVFP4_D16_SP), "VFP4">;
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def HasDPVFP : Predicate<"Subtarget->hasFP64()">,
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AssemblerPredicate<(all_of FeatureFP64),
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"double precision VFP">;
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def HasFPARMv8 : Predicate<"Subtarget->hasFPARMv8Base()">,
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AssemblerPredicate<(all_of FeatureFPARMv8_D16_SP), "FPARMv8">;
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def HasNEON : Predicate<"Subtarget->hasNEON()">,
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AssemblerPredicate<(all_of FeatureNEON), "NEON">;
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def HasSHA2 : Predicate<"Subtarget->hasSHA2()">,
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AssemblerPredicate<(all_of FeatureSHA2), "sha2">;
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def HasAES : Predicate<"Subtarget->hasAES()">,
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AssemblerPredicate<(all_of FeatureAES), "aes">;
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def HasCrypto : Predicate<"Subtarget->hasCrypto()">,
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AssemblerPredicate<(all_of FeatureCrypto), "crypto">;
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def HasDotProd : Predicate<"Subtarget->hasDotProd()">,
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AssemblerPredicate<(all_of FeatureDotProd), "dotprod">;
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def HasCRC : Predicate<"Subtarget->hasCRC()">,
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AssemblerPredicate<(all_of FeatureCRC), "crc">;
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def HasRAS : Predicate<"Subtarget->hasRAS()">,
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AssemblerPredicate<(all_of FeatureRAS), "ras">;
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def HasLOB : Predicate<"Subtarget->hasLOB()">,
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AssemblerPredicate<(all_of FeatureLOB), "lob">;
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def HasFP16 : Predicate<"Subtarget->hasFP16()">,
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AssemblerPredicate<(all_of FeatureFP16),"half-float conversions">;
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def HasFullFP16 : Predicate<"Subtarget->hasFullFP16()">,
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AssemblerPredicate<(all_of FeatureFullFP16),"full half-float">;
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def HasFP16FML : Predicate<"Subtarget->hasFP16FML()">,
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AssemblerPredicate<(all_of FeatureFP16FML),"full half-float fml">;
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def HasBF16 : Predicate<"Subtarget->hasBF16()">,
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AssemblerPredicate<(all_of FeatureBF16),"BFloat16 floating point extension">;
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def HasMatMulInt8 : Predicate<"Subtarget->hasMatMulInt8()">,
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AssemblerPredicate<(all_of FeatureMatMulInt8),"8-bit integer matrix multiply">;
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def HasDivideInThumb : Predicate<"Subtarget->hasDivideInThumbMode()">,
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AssemblerPredicate<(all_of FeatureHWDivThumb), "divide in THUMB">;
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def HasDivideInARM : Predicate<"Subtarget->hasDivideInARMMode()">,
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AssemblerPredicate<(all_of FeatureHWDivARM), "divide in ARM">;
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def HasDSP : Predicate<"Subtarget->hasDSP()">,
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AssemblerPredicate<(all_of FeatureDSP), "dsp">;
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def HasDB : Predicate<"Subtarget->hasDataBarrier()">,
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AssemblerPredicate<(all_of FeatureDB),
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"data-barriers">;
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def HasDFB : Predicate<"Subtarget->hasFullDataBarrier()">,
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AssemblerPredicate<(all_of FeatureDFB),
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"full-data-barrier">;
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def HasV7Clrex : Predicate<"Subtarget->hasV7Clrex()">,
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AssemblerPredicate<(all_of FeatureV7Clrex),
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"v7 clrex">;
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def HasAcquireRelease : Predicate<"Subtarget->hasAcquireRelease()">,
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AssemblerPredicate<(all_of FeatureAcquireRelease),
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"acquire/release">;
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def HasMP : Predicate<"Subtarget->hasMPExtension()">,
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AssemblerPredicate<(all_of FeatureMP),
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"mp-extensions">;
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def HasVirtualization: Predicate<"false">,
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AssemblerPredicate<(all_of FeatureVirtualization),
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"virtualization-extensions">;
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def HasTrustZone : Predicate<"Subtarget->hasTrustZone()">,
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AssemblerPredicate<(all_of FeatureTrustZone),
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"TrustZone">;
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def Has8MSecExt : Predicate<"Subtarget->has8MSecExt()">,
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AssemblerPredicate<(all_of Feature8MSecExt),
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"ARMv8-M Security Extensions">;
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def HasZCZ : Predicate<"Subtarget->hasZeroCycleZeroing()">;
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def UseNEONForFP : Predicate<"Subtarget->useNEONForSinglePrecisionFP()">;
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def DontUseNEONForFP : Predicate<"!Subtarget->useNEONForSinglePrecisionFP()">;
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def IsThumb : Predicate<"Subtarget->isThumb()">,
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AssemblerPredicate<(all_of ModeThumb), "thumb">;
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def IsThumb1Only : Predicate<"Subtarget->isThumb1Only()">;
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def IsThumb2 : Predicate<"Subtarget->isThumb2()">,
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AssemblerPredicate<(all_of ModeThumb, FeatureThumb2),
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"thumb2">;
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def IsMClass : Predicate<"Subtarget->isMClass()">,
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AssemblerPredicate<(all_of FeatureMClass), "armv*m">;
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def IsNotMClass : Predicate<"!Subtarget->isMClass()">,
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AssemblerPredicate<(all_of (not FeatureMClass)),
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"!armv*m">;
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def IsARM : Predicate<"!Subtarget->isThumb()">,
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AssemblerPredicate<(all_of (not ModeThumb)), "arm-mode">;
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def IsMachO : Predicate<"Subtarget->isTargetMachO()">;
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def IsNotMachO : Predicate<"!Subtarget->isTargetMachO()">;
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def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">;
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def IsWindows : Predicate<"Subtarget->isTargetWindows()">;
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def IsNotWindows : Predicate<"!Subtarget->isTargetWindows()">;
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def IsReadTPHard : Predicate<"Subtarget->isReadTPHard()">;
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def IsReadTPSoft : Predicate<"!Subtarget->isReadTPHard()">;
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def UseNaClTrap : Predicate<"Subtarget->useNaClTrap()">,
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AssemblerPredicate<(all_of FeatureNaClTrap), "NaCl">;
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def DontUseNaClTrap : Predicate<"!Subtarget->useNaClTrap()">;
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def UseNegativeImmediates :
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Predicate<"false">,
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AssemblerPredicate<(all_of (not FeatureNoNegativeImmediates)),
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"NegativeImmediates">;
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// FIXME: Eventually this will be just "hasV6T2Ops".
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let RecomputePerFunction = 1 in {
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def UseMovt : Predicate<"Subtarget->useMovt()">;
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def DontUseMovt : Predicate<"!Subtarget->useMovt()">;
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def UseMovtInPic : Predicate<"Subtarget->useMovt() && Subtarget->allowPositionIndependentMovt()">;
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def DontUseMovtInPic : Predicate<"!Subtarget->useMovt() || !Subtarget->allowPositionIndependentMovt()">;
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def UseFPVMLx: Predicate<"((Subtarget->useFPVMLx() &&"
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" TM.Options.AllowFPOpFusion != FPOpFusion::Fast) ||"
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"Subtarget->hasMinSize())">;
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}
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def UseMulOps : Predicate<"Subtarget->useMulOps()">;
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// Prefer fused MAC for fp mul + add over fp VMLA / VMLS if they are available.
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// But only select them if more precision in FP computation is allowed, and when
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// they are not slower than a mul + add sequence.
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// Do not use them for Darwin platforms.
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def UseFusedMAC : Predicate<"TM.Options.AllowFPOpFusion =="
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" FPOpFusion::Fast && "
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"Subtarget->useFPVFMx()">;
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def HasFastVGETLNi32 : Predicate<"!Subtarget->hasSlowVGETLNi32()">;
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def HasSlowVGETLNi32 : Predicate<"Subtarget->hasSlowVGETLNi32()">;
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def HasFastVDUP32 : Predicate<"!Subtarget->hasSlowVDUP32()">;
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def HasSlowVDUP32 : Predicate<"Subtarget->hasSlowVDUP32()">;
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def UseVMOVSR : Predicate<"Subtarget->preferVMOVSR() ||"
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"!Subtarget->useNEONForSinglePrecisionFP()">;
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def DontUseVMOVSR : Predicate<"!Subtarget->preferVMOVSR() &&"
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"Subtarget->useNEONForSinglePrecisionFP()">;
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let RecomputePerFunction = 1 in {
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def IsLE : Predicate<"MF->getDataLayout().isLittleEndian()">;
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def IsBE : Predicate<"MF->getDataLayout().isBigEndian()">;
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}
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def GenExecuteOnly : Predicate<"Subtarget->genExecuteOnly()">;
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// Armv8.5-A extensions
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def HasSB : Predicate<"Subtarget->hasSB()">,
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AssemblerPredicate<(all_of FeatureSB), "sb">;
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