1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-01 08:23:21 +01:00
llvm-mirror/test/CodeGen/CellSPU
Chris Lattner 47e8019142 fix visitShift to properly zero extend the shift amount if the provided operand
is narrower than the shift register.  Doing an anyext provides undefined bits in
the top part of the register.

llvm-svn: 125457
2011-02-13 09:02:52 +00:00
..
useful-harnesses
2009-01-01-BrCond.ll
2010-04-07-DbgValueOtherTargets.ll
and_ops.ll
arg_ret.ll
bigstack.ll
bss.ll
call_indirect.ll
call.ll
crash.ll
ctpop.ll
dg.exp
div_ops.ll
dp_farith.ll
eqv.ll
extract_elt.ll
fcmp32.ll
fcmp64.ll
fdiv.ll
fneg-fabs.ll
i8ops.ll
i64ops.ll
icmp8.ll
icmp16.ll
icmp32.ll
icmp64.ll
immed16.ll
immed32.ll
immed64.ll
int2fp.ll
intrinsics_branch.ll
intrinsics_float.ll
intrinsics_logical.ll
jumptable.ll
loads.ll
mul_ops.ll
mul-with-overflow.ll
nand.ll
or_ops.ll
private.ll
rotate_ops.ll
select_bits.ll
sext128.ll
shift_ops.ll fix visitShift to properly zero extend the shift amount if the provided operand 2011-02-13 09:02:52 +00:00
shuffles.ll
sp_farith.ll
stores.ll
storestruct.ll
struct_1.ll
sub_ops.ll
trunc.ll
v2f32.ll
v2i32.ll
vec_const.ll
vecinsert.ll