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1ddf684f4c
llvm-mirror/lib/Target/Sparc
History
Vikram S. Adve 1ddf684f4c Major bug fix though it happened rarely (only on a compare after an 
integer overflow):
We need to use %icc and not %xcc for comparisons on 32-bit or smaller
integer values.

llvm-svn: 7111
2003-07-06 20:13:59 +00:00
..
.cvsignore Since there is now another derived .inc file, ignore them all. 2003-05-29 20:15:27 +00:00
EmitAssembly.cpp Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
EmitBytecodeToAssembly.cpp
Makefile Merged in autoconf branch. This provides configuration via the autoconf 2003-06-30 21:59:07 +00:00
MappingInfo.cpp lib/CodeGen/Mapping/MappingInfo.cpp: 2003-06-04 22:07:12 +00:00
MappingInfo.h Add file comment. Include <vector> and <string>. Update include guards 2003-06-04 22:02:47 +00:00
PeepholeOpts.cpp
PreSelection.cpp (1) Major bug fix: DecomposeArrayRef() replaces its argument instr. and 2003-07-02 01:23:15 +00:00
PrologEpilogCodeInserter.cpp * Changed Bcc instructions to behave like BPcc instructions 2003-06-06 09:52:23 +00:00
Sparc.burg.in
Sparc.cpp lib/Target/Sparc/Sparc.cpp: 2003-06-18 21:14:23 +00:00
SparcInstr.def RDCCR defines arg. #1, not arg. #2. 2003-06-20 11:32:11 +00:00
SparcInstrInfo.cpp Merged in autoconf branch. This provides configuration via the autoconf 2003-06-30 21:59:07 +00:00
SparcInstrSelection.cpp Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
SparcInstrSelectionSupport.h * Changed Bcc instructions to behave like BPcc instructions 2003-06-06 09:52:23 +00:00
SparcInternals.h Make the RegClassID values public -- there is no other way to get them. 2003-07-06 19:53:59 +00:00
SparcRegClassInfo.cpp Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
SparcRegClassInfo.h Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
SparcRegInfo.cpp Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
SparcV9_F2.td Moved predict and annul fields to the end of each individual instruction 2003-06-05 23:33:15 +00:00
SparcV9_F3.td * Force all "don't care" bits to 0 so that there are absolutely no unset bits in 2003-07-02 19:37:48 +00:00
SparcV9_F4.td * Force all "don't care" bits to 0 so that there are absolutely no unset bits in 2003-07-02 19:37:48 +00:00
SparcV9_Reg.td
SparcV9.td Properly fix instruction syntax in comments, using `imm' for instructions that 2003-07-02 18:15:43 +00:00
SparcV9CodeEmitter.cpp Apparently, the "regType" and "regClass" used in the Sparc backend are not both 2003-07-03 18:36:47 +00:00
SparcV9CodeEmitter.h Apparently, the "regType" and "regClass" used in the Sparc backend are not both 2003-07-03 18:36:47 +00:00
StackSlots.cpp
UltraSparcSchedInfo.cpp Added 'r' and 'i' versions to WRCCR. 2003-06-06 09:52:58 +00:00