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ab043ff680
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
74 lines
2.8 KiB
LLVM
74 lines
2.8 KiB
LLVM
; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - -no-integrated-as | FileCheck %s
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; C code this came from
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;bool cas(float volatile *p, float *expected, float desired) {
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; bool success;
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; __asm__ __volatile__("lock; cmpxchg %[desired], %[mem]; "
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; "mov %[expected], %[expected_out]; "
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; "sete %[success]"
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; : [success] "=a" (success),
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; [expected_out] "=rm" (*expected)
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; : [expected] "a" (*expected),
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; [desired] "q" (desired),
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; [mem] "m" (*p)
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; : "memory", "cc");
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; return success;
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;}
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define zeroext i1 @cas(float* %p, float* %expected, float %desired) nounwind {
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entry:
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%p.addr = alloca float*, align 8
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%expected.addr = alloca float*, align 8
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%desired.addr = alloca float, align 4
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%success = alloca i8, align 1
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store float* %p, float** %p.addr, align 8
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store float* %expected, float** %expected.addr, align 8
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store float %desired, float* %desired.addr, align 4
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%0 = load float*, float** %expected.addr, align 8
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%1 = load float*, float** %expected.addr, align 8
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%2 = load float, float* %1, align 4
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%3 = load float, float* %desired.addr, align 4
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%4 = load float*, float** %p.addr, align 8
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%5 = call i8 asm sideeffect "lock; cmpxchg $3, $4; mov $2, $1; sete $0", "={ax},=*rm,{ax},q,*m,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(float* %0, float %2, float %3, float* %4) nounwind
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store i8 %5, i8* %success, align 1
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%6 = load i8, i8* %success, align 1
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%tobool = trunc i8 %6 to i1
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ret i1 %tobool
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}
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; CHECK: @cas
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; Make sure we're emitting a move from eax.
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; CHECK: #APP
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; CHECK-NEXT: lock;{{.*}}mov %eax,{{.*}}
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; CHECK-NEXT: #NO_APP
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define zeroext i1 @cas2(i8* %p, i8* %expected, i1 zeroext %desired) nounwind {
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entry:
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%p.addr = alloca i8*, align 8
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%expected.addr = alloca i8*, align 8
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%desired.addr = alloca i8, align 1
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%success = alloca i8, align 1
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store i8* %p, i8** %p.addr, align 8
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store i8* %expected, i8** %expected.addr, align 8
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%frombool = zext i1 %desired to i8
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store i8 %frombool, i8* %desired.addr, align 1
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%0 = load i8*, i8** %expected.addr, align 8
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%1 = load i8*, i8** %expected.addr, align 8
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%2 = load i8, i8* %1, align 1
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%tobool = trunc i8 %2 to i1
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%3 = load i8, i8* %desired.addr, align 1
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%tobool1 = trunc i8 %3 to i1
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%4 = load i8*, i8** %p.addr, align 8
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%5 = call i8 asm sideeffect "lock; cmpxchg $3, $4; mov $2, $1; sete $0", "={ax},=*rm,{ax},q,*m,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i8* %0, i1 %tobool, i1 %tobool1, i8* %4) nounwind
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store i8 %5, i8* %success, align 1
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%6 = load i8, i8* %success, align 1
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%tobool2 = trunc i8 %6 to i1
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ret i1 %tobool2
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}
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; CHECK: @cas2
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; Make sure we're emitting a move from %al here.
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; CHECK: #APP
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; CHECK-NEXT: lock;{{.*}}mov %al,{{.*}}
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; CHECK-NEXT: #NO_APP
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