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81ce398cd5
This patch adds an initial x86 SimplifyDemandedVectorEltsForTargetNode implementation to handle target shuffles. Currently the patch only decodes a target shuffle, calls SimplifyDemandedVectorElts on its input operands and removes any shuffle that reduces to undef/zero/identity. Future work will need to integrate this with combineX86ShufflesRecursively, add support for other x86 ops, etc. NOTE: There is a minor regression that appears to be affecting further (extractelement?) combines which I haven't been able to solve yet - possibly something to do with how nodes are added to the worklist after simplification. Differential Revision: https://reviews.llvm.org/D52140 llvm-svn: 342564
40 lines
1.1 KiB
LLVM
40 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-darwin | FileCheck %s
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; CHECK-LABEL: LCPI0_0:
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; CHECK-NEXT: .long 4286578688
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; CHECK-LABEL: LCPI0_1:
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; CHECK-NEXT: .long 2139095040
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define x86_fp80 @foo(x86_fp80 %a) {
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; CHECK-LABEL: foo:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fstpt -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: testb $-128, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: flds {{.*}}(%rip)
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; CHECK-NEXT: flds {{.*}}(%rip)
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; CHECK-NEXT: fcmovne %st(1), %st(0)
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; CHECK-NEXT: fstp %st(1)
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; CHECK-NEXT: retq
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%1 = tail call x86_fp80 @copysignl(x86_fp80 0xK7FFF8000000000000000, x86_fp80 %a) nounwind readnone
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ret x86_fp80 %1
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}
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declare x86_fp80 @copysignl(x86_fp80, x86_fp80) nounwind readnone
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; This would crash:
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; https://llvm.org/bugs/show_bug.cgi?id=26070
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define float @pr26070() {
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; CHECK-LABEL: pr26070:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK-NEXT: retq
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%c = call float @copysignf(float 1.0, float undef) readnone
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ret float %c
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}
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declare float @copysignf(float, float)
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