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https://github.com/RPCS3/llvm-mirror.git
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d654e7d40c
Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
506 lines
14 KiB
LLVM
506 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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; Select of constants: control flow / conditional moves can always be replaced by logic+math (but may not be worth it?).
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; Test the zeroext/signext variants of each pattern to see if that makes a difference.
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; select Cond, 0, 1 --> zext (!Cond)
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define i32 @select_0_or_1(i1 %cond) {
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; CHECK-LABEL: select_0_or_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: notb %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 0, i32 1
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ret i32 %sel
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}
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define i32 @select_0_or_1_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_0_or_1_zeroext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorb $1, %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 0, i32 1
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ret i32 %sel
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}
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define i32 @select_0_or_1_signext(i1 signext %cond) {
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; CHECK-LABEL: select_0_or_1_signext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: notb %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 0, i32 1
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ret i32 %sel
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}
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; select Cond, 1, 0 --> zext (Cond)
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define i32 @select_1_or_0(i1 %cond) {
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; CHECK-LABEL: select_1_or_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 1, i32 0
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ret i32 %sel
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}
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define i32 @select_1_or_0_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_1_or_0_zeroext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 1, i32 0
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ret i32 %sel
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}
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define i32 @select_1_or_0_signext(i1 signext %cond) {
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; CHECK-LABEL: select_1_or_0_signext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 1, i32 0
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ret i32 %sel
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}
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; select Cond, 0, -1 --> sext (!Cond)
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define i32 @select_0_or_neg1(i1 %cond) {
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; CHECK-LABEL: select_0_or_neg1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: leal -1(%rdi), %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 0, i32 -1
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ret i32 %sel
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}
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define i32 @select_0_or_neg1_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_0_or_neg1_zeroext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: leal -1(%rdi), %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 0, i32 -1
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ret i32 %sel
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}
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define i32 @select_0_or_neg1_signext(i1 signext %cond) {
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; CHECK-LABEL: select_0_or_neg1_signext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: notl %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 0, i32 -1
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ret i32 %sel
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}
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; select Cond, -1, 0 --> sext (Cond)
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define i32 @select_neg1_or_0(i1 %cond) {
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; CHECK-LABEL: select_neg1_or_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 -1, i32 0
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ret i32 %sel
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}
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define i32 @select_neg1_or_0_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_neg1_or_0_zeroext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 -1, i32 0
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ret i32 %sel
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}
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define i32 @select_neg1_or_0_signext(i1 signext %cond) {
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; CHECK-LABEL: select_neg1_or_0_signext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 -1, i32 0
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ret i32 %sel
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}
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; select Cond, C+1, C --> add (zext Cond), C
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define i32 @select_Cplus1_C(i1 %cond) {
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; CHECK-LABEL: select_Cplus1_C:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: leal 41(%rdi), %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 42, i32 41
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ret i32 %sel
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}
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define i32 @select_Cplus1_C_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_Cplus1_C_zeroext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: leal 41(%rdi), %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 42, i32 41
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ret i32 %sel
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}
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define i32 @select_Cplus1_C_signext(i1 signext %cond) {
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; CHECK-LABEL: select_Cplus1_C_signext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl $41, %eax
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; CHECK-NEXT: subl %edi, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 42, i32 41
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ret i32 %sel
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}
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; select Cond, C, C+1 --> add (sext Cond), C
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define i32 @select_C_Cplus1(i1 %cond) {
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; CHECK-LABEL: select_C_Cplus1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: subl %edi, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 41, i32 42
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ret i32 %sel
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}
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define i32 @select_C_Cplus1_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_C_Cplus1_zeroext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: subl %edi, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 41, i32 42
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ret i32 %sel
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}
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define i32 @select_C_Cplus1_signext(i1 signext %cond) {
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; CHECK-LABEL: select_C_Cplus1_signext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: subl %edi, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 41, i32 42
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ret i32 %sel
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}
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; If the constants differ by a small multiplier, use LEA.
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; select Cond, C1, C2 --> add (mul (zext Cond), C1-C2), C2 --> LEA C2(Cond * (C1-C2))
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define i32 @select_lea_2(i1 zeroext %cond) {
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; CHECK-LABEL: select_lea_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorb $1, %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: leal -1(%rax,%rax), %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 -1, i32 1
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ret i32 %sel
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}
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define i64 @select_lea_3(i1 zeroext %cond) {
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; CHECK-LABEL: select_lea_3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorb $1, %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: leaq -2(%rax,%rax,2), %rax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i64 -2, i64 1
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ret i64 %sel
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}
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define i32 @select_lea_5(i1 zeroext %cond) {
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; CHECK-LABEL: select_lea_5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorb $1, %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: leal -2(%rax,%rax,4), %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 -2, i32 3
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ret i32 %sel
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}
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define i64 @select_lea_9(i1 zeroext %cond) {
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; CHECK-LABEL: select_lea_9:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorb $1, %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: leaq -7(%rax,%rax,8), %rax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i64 -7, i64 2
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ret i64 %sel
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}
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; Should this be 'sbb x,x' or 'sbb 0,x' with simpler LEA or add?
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define i64 @sel_1_2(i64 %x, i64 %y) {
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; CHECK-LABEL: sel_1_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpq $42, %rdi
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; CHECK-NEXT: sbbq $0, %rsi
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; CHECK-NEXT: leaq 2(%rsi), %rax
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; CHECK-NEXT: retq
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%cmp = icmp ult i64 %x, 42
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%sel = select i1 %cmp, i64 1, i64 2
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%sub = add i64 %sel, %y
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ret i64 %sub
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}
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; No LEA with 8-bit, but this shouldn't need branches or cmov.
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define i8 @sel_1_neg1(i32 %x) {
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; CHECK-LABEL: sel_1_neg1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpl $42, %edi
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; CHECK-NEXT: setg %al
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; CHECK-NEXT: shlb $2, %al
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; CHECK-NEXT: decb %al
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; CHECK-NEXT: retq
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%cmp = icmp sgt i32 %x, 42
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%sel = select i1 %cmp, i8 3, i8 -1
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ret i8 %sel
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}
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; We get an LEA for 16-bit because we ignore the high-bits.
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define i16 @sel_neg1_1(i32 %x) {
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; CHECK-LABEL: sel_neg1_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpl $43, %edi
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; CHECK-NEXT: setl %al
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; CHECK-NEXT: leal -1(,%rax,4), %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: retq
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%cmp = icmp sgt i32 %x, 42
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%sel = select i1 %cmp, i16 -1, i16 3
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ret i16 %sel
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}
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; If the comparison is available, the predicate can be inverted.
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define i32 @sel_1_neg1_32(i32 %x) {
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; CHECK-LABEL: sel_1_neg1_32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpl $42, %edi
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; CHECK-NEXT: setg %al
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; CHECK-NEXT: leal -1(%rax,%rax,8), %eax
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; CHECK-NEXT: retq
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%cmp = icmp sgt i32 %x, 42
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%sel = select i1 %cmp, i32 8, i32 -1
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ret i32 %sel
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}
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define i32 @sel_neg1_1_32(i32 %x) {
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; CHECK-LABEL: sel_neg1_1_32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpl $43, %edi
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; CHECK-NEXT: setl %al
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; CHECK-NEXT: leal -7(%rax,%rax,8), %eax
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; CHECK-NEXT: retq
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%cmp = icmp sgt i32 %x, 42
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%sel = select i1 %cmp, i32 -7, i32 2
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ret i32 %sel
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}
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; If the constants differ by a large power-of-2, that can be a shift of the difference plus the smaller constant.
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; select Cond, C1, C2 --> add (mul (zext Cond), C1-C2), C2
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define i8 @select_pow2_diff(i1 zeroext %cond) {
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; CHECK-LABEL: select_pow2_diff:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: shlb $4, %al
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; CHECK-NEXT: orb $3, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i8 19, i8 3
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ret i8 %sel
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}
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define i16 @select_pow2_diff_invert(i1 zeroext %cond) {
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; CHECK-LABEL: select_pow2_diff_invert:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorb $1, %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: shll $6, %eax
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; CHECK-NEXT: orl $7, %eax
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; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i16 7, i16 71
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ret i16 %sel
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}
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define i32 @select_pow2_diff_neg(i1 zeroext %cond) {
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; CHECK-LABEL: select_pow2_diff_neg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: shlb $4, %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: orl $-25, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 -9, i32 -25
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ret i32 %sel
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}
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define i64 @select_pow2_diff_neg_invert(i1 zeroext %cond) {
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; CHECK-LABEL: select_pow2_diff_neg_invert:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorb $1, %dil
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: shlq $7, %rax
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; CHECK-NEXT: addq $-99, %rax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i64 -99, i64 29
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ret i64 %sel
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}
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; This doesn't need a branch, but don't do the wrong thing if subtraction of the constants overflows.
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define i8 @sel_67_neg125(i32 %x) {
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; CHECK-LABEL: sel_67_neg125:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpl $42, %edi
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; CHECK-NEXT: movb $67, %al
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; CHECK-NEXT: jg .LBB31_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: movb $-125, %al
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; CHECK-NEXT: .LBB31_2:
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; CHECK-NEXT: retq
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%cmp = icmp sgt i32 %x, 42
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%sel = select i1 %cmp, i8 67, i8 -125
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ret i8 %sel
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}
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; In general, select of 2 constants could be:
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; select Cond, C1, C2 --> add (mul (zext Cond), C1-C2), C2 --> add (and (sext Cond), C1-C2), C2
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define i32 @select_C1_C2(i1 %cond) {
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; CHECK-LABEL: select_C1_C2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: movl $421, %ecx # imm = 0x1A5
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: cmovnel %ecx, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 421, i32 42
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ret i32 %sel
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}
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define i32 @select_C1_C2_zeroext(i1 zeroext %cond) {
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; CHECK-LABEL: select_C1_C2_zeroext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: movl $421, %ecx # imm = 0x1A5
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: cmovnel %ecx, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 421, i32 42
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ret i32 %sel
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}
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define i32 @select_C1_C2_signext(i1 signext %cond) {
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; CHECK-LABEL: select_C1_C2_signext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: testb $1, %dil
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; CHECK-NEXT: movl $421, %ecx # imm = 0x1A5
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: cmovnel %ecx, %eax
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; CHECK-NEXT: retq
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%sel = select i1 %cond, i32 421, i32 42
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ret i32 %sel
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}
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; select (x == 2), 2, (x + 1) --> select (x == 2), x, (x + 1)
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|
|
|
define i64 @select_2_or_inc(i64 %x) {
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|
; CHECK-LABEL: select_2_or_inc:
|
|
; CHECK: # %bb.0:
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|
; CHECK-NEXT: leaq 1(%rdi), %rax
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|
; CHECK-NEXT: cmpq $2, %rdi
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|
; CHECK-NEXT: cmoveq %rdi, %rax
|
|
; CHECK-NEXT: retq
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|
%cmp = icmp eq i64 %x, 2
|
|
%add = add i64 %x, 1
|
|
%retval.0 = select i1 %cmp, i64 2, i64 %add
|
|
ret i64 %retval.0
|
|
}
|
|
|
|
define <4 x i32> @sel_constants_add_constant_vec(i1 %cond) {
|
|
; CHECK-LABEL: sel_constants_add_constant_vec:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: testb $1, %dil
|
|
; CHECK-NEXT: jne .LBB36_1
|
|
; CHECK-NEXT: # %bb.2:
|
|
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [12,13,14,15]
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: .LBB36_1:
|
|
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [4294967293,14,4,4]
|
|
; CHECK-NEXT: retq
|
|
%sel = select i1 %cond, <4 x i32> <i32 -4, i32 12, i32 1, i32 0>, <4 x i32> <i32 11, i32 11, i32 11, i32 11>
|
|
%bo = add <4 x i32> %sel, <i32 1, i32 2, i32 3, i32 4>
|
|
ret <4 x i32> %bo
|
|
}
|
|
|
|
define <2 x double> @sel_constants_fmul_constant_vec(i1 %cond) {
|
|
; CHECK-LABEL: sel_constants_fmul_constant_vec:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: testb $1, %dil
|
|
; CHECK-NEXT: jne .LBB37_1
|
|
; CHECK-NEXT: # %bb.2:
|
|
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1.188300e+02,3.454000e+01]
|
|
; CHECK-NEXT: retq
|
|
; CHECK-NEXT: .LBB37_1:
|
|
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [-2.040000e+01,3.768000e+01]
|
|
; CHECK-NEXT: retq
|
|
%sel = select i1 %cond, <2 x double> <double -4.0, double 12.0>, <2 x double> <double 23.3, double 11.0>
|
|
%bo = fmul <2 x double> %sel, <double 5.1, double 3.14>
|
|
ret <2 x double> %bo
|
|
}
|
|
|
|
; 4294967297 = 0x100000001.
|
|
; This becomes an opaque constant via ConstantHoisting, so we don't fold it into the select.
|
|
|
|
define i64 @opaque_constant(i1 %cond, i64 %x) {
|
|
; CHECK-LABEL: opaque_constant:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: testb $1, %dil
|
|
; CHECK-NEXT: movq $-4, %rcx
|
|
; CHECK-NEXT: movl $23, %eax
|
|
; CHECK-NEXT: cmovneq %rcx, %rax
|
|
; CHECK-NEXT: movabsq $4294967297, %rcx # imm = 0x100000001
|
|
; CHECK-NEXT: andq %rcx, %rax
|
|
; CHECK-NEXT: xorl %edx, %edx
|
|
; CHECK-NEXT: cmpq %rcx, %rsi
|
|
; CHECK-NEXT: sete %dl
|
|
; CHECK-NEXT: subq %rdx, %rax
|
|
; CHECK-NEXT: retq
|
|
%sel = select i1 %cond, i64 -4, i64 23
|
|
%bo = and i64 %sel, 4294967297
|
|
%cmp = icmp eq i64 %x, 4294967297
|
|
%sext = sext i1 %cmp to i64
|
|
%add = add i64 %bo, %sext
|
|
ret i64 %add
|
|
}
|
|
|