mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 11:13:28 +01:00
13657cc965
Now that D51487 has landed, the last machine verifier tests that failed EXPENSIVE_CHECKS builds have now been fixed/removed, so we can remove @MatzeB 's isMachineVerifierClean() hack for sparc targets. Differential Revision: https://reviews.llvm.org/D52612 llvm-svn: 343232
80 lines
2.8 KiB
C++
80 lines
2.8 KiB
C++
//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file declares the Sparc specific subclass of TargetMachine.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
|
|
#define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
|
|
|
|
#include "SparcInstrInfo.h"
|
|
#include "SparcSubtarget.h"
|
|
#include "llvm/Target/TargetMachine.h"
|
|
|
|
namespace llvm {
|
|
|
|
class SparcTargetMachine : public LLVMTargetMachine {
|
|
std::unique_ptr<TargetLoweringObjectFile> TLOF;
|
|
SparcSubtarget Subtarget;
|
|
bool is64Bit;
|
|
mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
|
|
public:
|
|
SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
|
|
StringRef FS, const TargetOptions &Options,
|
|
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
|
|
CodeGenOpt::Level OL, bool JIT, bool is64bit);
|
|
~SparcTargetMachine() override;
|
|
|
|
const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; }
|
|
const SparcSubtarget *getSubtargetImpl(const Function &) const override;
|
|
|
|
// Pass Pipeline Configuration
|
|
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
|
|
TargetLoweringObjectFile *getObjFileLowering() const override {
|
|
return TLOF.get();
|
|
}
|
|
};
|
|
|
|
/// Sparc 32-bit target machine
|
|
///
|
|
class SparcV8TargetMachine : public SparcTargetMachine {
|
|
virtual void anchor();
|
|
public:
|
|
SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
|
|
StringRef FS, const TargetOptions &Options,
|
|
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
|
|
CodeGenOpt::Level OL, bool JIT);
|
|
};
|
|
|
|
/// Sparc 64-bit target machine
|
|
///
|
|
class SparcV9TargetMachine : public SparcTargetMachine {
|
|
virtual void anchor();
|
|
public:
|
|
SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
|
|
StringRef FS, const TargetOptions &Options,
|
|
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
|
|
CodeGenOpt::Level OL, bool JIT);
|
|
};
|
|
|
|
class SparcelTargetMachine : public SparcTargetMachine {
|
|
virtual void anchor();
|
|
|
|
public:
|
|
SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
|
|
StringRef FS, const TargetOptions &Options,
|
|
Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
|
|
CodeGenOpt::Level OL, bool JIT);
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif
|