Jakob Stoklund Olesen f73b30b329 Simplify RegScavenger::forward a bit more. ... Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. llvm-svn: 78465		2009-08-08 13:18:47 +00:00
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Alpha	Make promotion in operation legalization for SETCC work correctly.	2009-07-17 05:16:04 +00:00
ARM	Convert more Neon tests to use FileCheck.	2009-08-07 23:45:02 +00:00
Blackfin	Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs.	2009-08-05 03:53:14 +00:00
CBackend	Fix an erroneous check for isFNeg; the FNeg case is handled	2009-06-04 23:43:29 +00:00
CellSPU	Add some generic expansion logic for SMULO and UMULO. Fixes UMULO	2009-06-16 06:58:29 +00:00
CPP	Fix code emission for conditional branches.	2009-05-04 19:10:38 +00:00
Generic	Remove the IA-64 backend.	2009-07-24 00:30:09 +00:00
Mips	Pass target triple string in to TargetMachine constructor.	2009-08-03 04:03:51 +00:00
MSP430	Split the Add, Sub, and Mul instruction opcodes into separate	2009-06-04 22:49:04 +00:00
PIC16	this passes.	2009-08-06 03:55:49 +00:00
PowerPC	Revert r75663 (and r76805), as it is causing regressions on powerpc.	2009-07-23 00:09:46 +00:00
SPARC	Split the Add, Sub, and Mul instruction opcodes into separate	2009-06-04 22:49:04 +00:00
SystemZ	Add testcases for reg-mem arithemtics added recently	2009-08-05 17:04:32 +00:00
Thumb	tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.	2009-07-28 07:38:35 +00:00
Thumb2	Simplify RegScavenger::forward a bit more.	2009-08-08 13:18:47 +00:00
X86	Do not generate 32-bit call on win64 when imm does not fit	2009-08-07 23:59:21 +00:00
XCore	Add extra SEXT pattern.	2009-08-02 22:45:24 +00:00