mirror of
https://github.com/RPCS3/llvm-mirror.git
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1e9ddf188d
Patch by Matheus Almeida and Toma Tabacu The lld test failure on the previous attempt to commit was caused by the addition of the .pdr section causing the offsets it was checking to change. This has been fixed by removing the .ent/.end directives from that test since they weren't really needed. llvm-svn: 215535
781 lines
25 KiB
C++
781 lines
25 KiB
C++
//===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Mips specific target streamer methods.
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//
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//===----------------------------------------------------------------------===//
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#include "InstPrinter/MipsInstPrinter.h"
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#include "MipsELFStreamer.h"
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#include "MipsMCTargetDesc.h"
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#include "MipsTargetObjectFile.h"
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#include "MipsTargetStreamer.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCELF.h"
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#include "llvm/MC/MCSectionELF.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ELF.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
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: MCTargetStreamer(S), canHaveModuleDirective(true) {
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GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
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}
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void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
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void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
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void MipsTargetStreamer::emitDirectiveSetMips16() {}
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void MipsTargetStreamer::emitDirectiveSetNoMips16() {}
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void MipsTargetStreamer::emitDirectiveSetReorder() {}
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void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
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void MipsTargetStreamer::emitDirectiveSetMacro() {}
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void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
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void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetAt() {}
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void MipsTargetStreamer::emitDirectiveSetNoAt() {}
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void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
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void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
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void MipsTargetStreamer::emitDirectiveAbiCalls() {}
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void MipsTargetStreamer::emitDirectiveNaN2008() {}
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void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
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void MipsTargetStreamer::emitDirectiveOptionPic0() {}
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void MipsTargetStreamer::emitDirectiveOptionPic2() {}
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void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
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unsigned ReturnReg) {}
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void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
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void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
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}
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void MipsTargetStreamer::emitDirectiveSetMips1() {}
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void MipsTargetStreamer::emitDirectiveSetMips2() {}
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void MipsTargetStreamer::emitDirectiveSetMips3() {}
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void MipsTargetStreamer::emitDirectiveSetMips4() {}
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void MipsTargetStreamer::emitDirectiveSetMips5() {}
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void MipsTargetStreamer::emitDirectiveSetMips32() {}
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void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
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void MipsTargetStreamer::emitDirectiveSetMips32R6() {}
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void MipsTargetStreamer::emitDirectiveSetMips64() {}
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void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
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void MipsTargetStreamer::emitDirectiveSetMips64R6() {}
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void MipsTargetStreamer::emitDirectiveSetDsp() {}
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void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
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void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
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const MCSymbol &Sym, bool IsReg) {
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}
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void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
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bool IsO32ABI) {
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if (!Enabled && !IsO32ABI)
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report_fatal_error("+nooddspreg is only valid for O32");
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}
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MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
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formatted_raw_ostream &OS)
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: MipsTargetStreamer(S), OS(OS) {}
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void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
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OS << "\t.set\tmicromips\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
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OS << "\t.set\tnomicromips\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
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OS << "\t.set\tmips16\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
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OS << "\t.set\tnomips16\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
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OS << "\t.set\treorder\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
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OS << "\t.set\tnoreorder\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
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OS << "\t.set\tmacro\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
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OS << "\t.set\tnomacro\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
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OS << "\t.set\tmsa\n";
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MipsTargetStreamer::emitDirectiveSetMsa();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
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OS << "\t.set\tnomsa\n";
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MipsTargetStreamer::emitDirectiveSetNoMsa();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetAt() {
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OS << "\t.set\tat\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
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OS << "\t.set\tnoat\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
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OS << "\t.end\t" << Name << '\n';
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}
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void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
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OS << "\t.ent\t" << Symbol.getName() << '\n';
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}
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void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
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void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
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void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
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OS << "\t.nan\tlegacy\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
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OS << "\t.option\tpic0\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
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OS << "\t.option\tpic2\n";
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}
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void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
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unsigned ReturnReg) {
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OS << "\t.frame\t$"
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<< StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
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<< StackSize << ",$"
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<< StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
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OS << "\t.set\tmips1\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
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OS << "\t.set\tmips2\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
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OS << "\t.set\tmips3\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
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OS << "\t.set\tmips4\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
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OS << "\t.set\tmips5\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
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OS << "\t.set\tmips32\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
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OS << "\t.set\tmips32r2\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
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OS << "\t.set\tmips32r6\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
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OS << "\t.set\tmips64\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
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OS << "\t.set\tmips64r2\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
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OS << "\t.set\tmips64r6\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
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OS << "\t.set\tdsp\n";
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setCanHaveModuleDir(false);
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}
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// Print a 32 bit hex number with all numbers.
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static void printHex32(unsigned Value, raw_ostream &OS) {
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OS << "0x";
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for (int i = 7; i >= 0; i--)
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OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
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}
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void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
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int CPUTopSavedRegOff) {
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OS << "\t.mask \t";
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printHex32(CPUBitmask, OS);
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OS << ',' << CPUTopSavedRegOff << '\n';
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}
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void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
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int FPUTopSavedRegOff) {
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OS << "\t.fmask\t";
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printHex32(FPUBitmask, OS);
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OS << "," << FPUTopSavedRegOff << '\n';
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}
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void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
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OS << "\t.cpload\t$"
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<< StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
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int RegOrOffset,
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const MCSymbol &Sym,
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bool IsReg) {
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OS << "\t.cpsetup\t$"
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<< StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
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if (IsReg)
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OS << "$"
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<< StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
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else
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OS << RegOrOffset;
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OS << ", ";
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OS << Sym.getName() << "\n";
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setCanHaveModuleDir(false);
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}
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void MipsTargetAsmStreamer::emitDirectiveModuleFP(
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MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
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MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
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StringRef ModuleValue;
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OS << "\t.module\tfp=";
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OS << ABIFlagsSection.getFpABIString(Value) << "\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetFp(
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MipsABIFlagsSection::FpABIKind Value) {
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StringRef ModuleValue;
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OS << "\t.set\tfp=";
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OS << ABIFlagsSection.getFpABIString(Value) << "\n";
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}
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void MipsTargetAsmStreamer::emitMipsAbiFlags() {
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// No action required for text output.
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}
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void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
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bool IsO32ABI) {
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MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
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OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
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}
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// This part is for ELF object output.
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MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
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const MCSubtargetInfo &STI)
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: MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
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MCAssembler &MCA = getStreamer().getAssembler();
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uint64_t Features = STI.getFeatureBits();
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Triple T(STI.getTargetTriple());
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Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
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? true
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: false;
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// Update e_header flags
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unsigned EFlags = 0;
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// Architecture
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if (Features & Mips::FeatureMips64r6)
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EFlags |= ELF::EF_MIPS_ARCH_64R6;
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else if (Features & Mips::FeatureMips64r2)
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EFlags |= ELF::EF_MIPS_ARCH_64R2;
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else if (Features & Mips::FeatureMips64)
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EFlags |= ELF::EF_MIPS_ARCH_64;
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else if (Features & Mips::FeatureMips5)
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EFlags |= ELF::EF_MIPS_ARCH_5;
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else if (Features & Mips::FeatureMips4)
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EFlags |= ELF::EF_MIPS_ARCH_4;
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else if (Features & Mips::FeatureMips3)
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EFlags |= ELF::EF_MIPS_ARCH_3;
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else if (Features & Mips::FeatureMips32r6)
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EFlags |= ELF::EF_MIPS_ARCH_32R6;
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else if (Features & Mips::FeatureMips32r2)
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EFlags |= ELF::EF_MIPS_ARCH_32R2;
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else if (Features & Mips::FeatureMips32)
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EFlags |= ELF::EF_MIPS_ARCH_32;
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else if (Features & Mips::FeatureMips2)
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EFlags |= ELF::EF_MIPS_ARCH_2;
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else
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EFlags |= ELF::EF_MIPS_ARCH_1;
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// ABI
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// N64 does not require any ABI bits.
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if (Features & Mips::FeatureO32)
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EFlags |= ELF::EF_MIPS_ABI_O32;
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else if (Features & Mips::FeatureN32)
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EFlags |= ELF::EF_MIPS_ABI2;
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if (Features & Mips::FeatureGP64Bit) {
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if (Features & Mips::FeatureO32)
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EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
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} else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
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EFlags |= ELF::EF_MIPS_32BITMODE;
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// Other options.
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if (Features & Mips::FeatureNaN2008)
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EFlags |= ELF::EF_MIPS_NAN2008;
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// -mabicalls and -mplt are not implemented but we should act as if they were
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// given.
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EFlags |= ELF::EF_MIPS_CPIC;
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if (Features & Mips::FeatureN64)
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EFlags |= ELF::EF_MIPS_PIC;
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MCA.setELFHeaderEFlags(EFlags);
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}
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void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
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if (!isMicroMipsEnabled())
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return;
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MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
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uint8_t Type = MCELF::GetType(Data);
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if (Type != ELF::STT_FUNC)
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return;
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// The "other" values are stored in the last 6 bits of the second byte
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// The traditional defines for STO values assume the full byte and thus
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// the shift to pack it.
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MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
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}
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void MipsTargetELFStreamer::finish() {
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MCAssembler &MCA = getStreamer().getAssembler();
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const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
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// .bss, .text and .data are always at least 16-byte aligned.
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MCSectionData &TextSectionData =
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MCA.getOrCreateSectionData(*OFI.getTextSection());
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MCSectionData &DataSectionData =
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MCA.getOrCreateSectionData(*OFI.getDataSection());
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MCSectionData &BSSSectionData =
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MCA.getOrCreateSectionData(*OFI.getBSSSection());
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TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
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DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
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BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
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// Emit all the option records.
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// At the moment we are only emitting .Mips.options (ODK_REGINFO) and
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// .reginfo.
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MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
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MEF.EmitMipsOptionRecords();
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emitMipsAbiFlags();
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}
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void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
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const MCExpr *Value) {
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// If on rhs is micromips symbol then mark Symbol as microMips.
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if (Value->getKind() != MCExpr::SymbolRef)
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return;
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const MCSymbol &RhsSym =
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static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
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MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
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uint8_t Type = MCELF::GetType(Data);
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if ((Type != ELF::STT_FUNC) ||
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!(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
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return;
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MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
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// The "other" values are stored in the last 6 bits of the second byte.
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// The traditional defines for STO values assume the full byte and thus
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// the shift to pack it.
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MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
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}
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MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
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return static_cast<MCELFStreamer &>(Streamer);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
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MicroMipsEnabled = true;
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_MICROMIPS;
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MCA.setELFHeaderEFlags(Flags);
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
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MicroMipsEnabled = false;
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips16() {
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
unsigned Flags = MCA.getELFHeaderEFlags();
|
|
Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
|
|
MCA.setELFHeaderEFlags(Flags);
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
|
|
// FIXME: implement.
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetReorder() {
|
|
// FIXME: implement.
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
unsigned Flags = MCA.getELFHeaderEFlags();
|
|
Flags |= ELF::EF_MIPS_NOREORDER;
|
|
MCA.setELFHeaderEFlags(Flags);
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMacro() {
|
|
// FIXME: implement.
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
|
|
// FIXME: implement.
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetAt() {
|
|
// FIXME: implement.
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
|
|
// FIXME: implement.
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
MCContext &Context = MCA.getContext();
|
|
MCStreamer &OS = getStreamer();
|
|
|
|
const MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS,
|
|
ELF::SHF_ALLOC | ELF::SHT_REL,
|
|
SectionKind::getMetadata());
|
|
|
|
const MCSymbolRefExpr *ExprRef =
|
|
MCSymbolRefExpr::Create(Name, MCSymbolRefExpr::VK_None, Context);
|
|
|
|
MCSectionData &SecData = MCA.getOrCreateSectionData(*Sec);
|
|
SecData.setAlignment(4);
|
|
|
|
OS.PushSection();
|
|
|
|
OS.SwitchSection(Sec);
|
|
|
|
OS.EmitValueImpl(ExprRef, 4);
|
|
|
|
OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
|
|
OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4); // reg_offset
|
|
|
|
OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
|
|
OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4); // fpreg_offset
|
|
|
|
OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
|
|
OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4); // frame_reg
|
|
OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg
|
|
|
|
// The .end directive marks the end of a procedure. Invalidate
|
|
// the information gathered up until this point.
|
|
GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
|
|
|
|
OS.PopSection();
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
|
|
GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
unsigned Flags = MCA.getELFHeaderEFlags();
|
|
Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
|
|
MCA.setELFHeaderEFlags(Flags);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveNaN2008() {
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
unsigned Flags = MCA.getELFHeaderEFlags();
|
|
Flags |= ELF::EF_MIPS_NAN2008;
|
|
MCA.setELFHeaderEFlags(Flags);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
unsigned Flags = MCA.getELFHeaderEFlags();
|
|
Flags &= ~ELF::EF_MIPS_NAN2008;
|
|
MCA.setELFHeaderEFlags(Flags);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
unsigned Flags = MCA.getELFHeaderEFlags();
|
|
// This option overrides other PIC options like -KPIC.
|
|
Pic = false;
|
|
Flags &= ~ELF::EF_MIPS_PIC;
|
|
MCA.setELFHeaderEFlags(Flags);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
unsigned Flags = MCA.getELFHeaderEFlags();
|
|
Pic = true;
|
|
// NOTE: We are following the GAS behaviour here which means the directive
|
|
// 'pic2' also sets the CPIC bit in the ELF header. This is different from
|
|
// what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
|
|
// EF_MIPS_CPIC to be mutually exclusive.
|
|
Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
|
|
MCA.setELFHeaderEFlags(Flags);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
|
|
unsigned ReturnReg_) {
|
|
MCContext &Context = getStreamer().getAssembler().getContext();
|
|
const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
|
|
|
|
FrameInfoSet = true;
|
|
FrameReg = RegInfo->getEncodingValue(StackReg);
|
|
FrameOffset = StackSize;
|
|
ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
|
|
int CPUTopSavedRegOff) {
|
|
GPRInfoSet = true;
|
|
GPRBitMask = CPUBitmask;
|
|
GPROffset = CPUTopSavedRegOff;
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
|
|
int FPUTopSavedRegOff) {
|
|
FPRInfoSet = true;
|
|
FPRBitMask = FPUBitmask;
|
|
FPROffset = FPUTopSavedRegOff;
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips1() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips2() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips3() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips4() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips5() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips32() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips32R6() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips64() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetMips64R6() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveSetDsp() {
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
|
|
// .cpload $reg
|
|
// This directive expands to:
|
|
// lui $gp, %hi(_gp_disp)
|
|
// addui $gp, $gp, %lo(_gp_disp)
|
|
// addu $gp, $gp, $reg
|
|
// when support for position independent code is enabled.
|
|
if (!Pic || (isN32() || isN64()))
|
|
return;
|
|
|
|
// There's a GNU extension controlled by -mno-shared that allows
|
|
// locally-binding symbols to be accessed using absolute addresses.
|
|
// This is currently not supported. When supported -mno-shared makes
|
|
// .cpload expand to:
|
|
// lui $gp, %hi(__gnu_local_gp)
|
|
// addiu $gp, $gp, %lo(__gnu_local_gp)
|
|
|
|
StringRef SymName("_gp_disp");
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
|
|
MCA.getOrCreateSymbolData(*GP_Disp);
|
|
|
|
MCInst TmpInst;
|
|
TmpInst.setOpcode(Mips::LUi);
|
|
TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
|
|
"_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
|
|
TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
|
|
getStreamer().EmitInstruction(TmpInst, STI);
|
|
|
|
TmpInst.clear();
|
|
|
|
TmpInst.setOpcode(Mips::ADDiu);
|
|
TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
|
|
"_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
|
|
TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
|
|
getStreamer().EmitInstruction(TmpInst, STI);
|
|
|
|
TmpInst.clear();
|
|
|
|
TmpInst.setOpcode(Mips::ADDu);
|
|
TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
TmpInst.addOperand(MCOperand::CreateReg(RegNo));
|
|
getStreamer().EmitInstruction(TmpInst, STI);
|
|
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
|
|
int RegOrOffset,
|
|
const MCSymbol &Sym,
|
|
bool IsReg) {
|
|
// Only N32 and N64 emit anything for .cpsetup iff PIC is set.
|
|
if (!Pic || !(isN32() || isN64()))
|
|
return;
|
|
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
MCInst Inst;
|
|
|
|
// Either store the old $gp in a register or on the stack
|
|
if (IsReg) {
|
|
// move $save, $gpreg
|
|
Inst.setOpcode(Mips::DADDu);
|
|
Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
|
|
Inst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
|
|
} else {
|
|
// sd $gpreg, offset($sp)
|
|
Inst.setOpcode(Mips::SD);
|
|
Inst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
Inst.addOperand(MCOperand::CreateReg(Mips::SP));
|
|
Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
|
|
}
|
|
getStreamer().EmitInstruction(Inst, STI);
|
|
Inst.clear();
|
|
|
|
const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
|
|
Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
|
|
const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
|
|
Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
|
|
// lui $gp, %hi(%neg(%gp_rel(funcSym)))
|
|
Inst.setOpcode(Mips::LUi);
|
|
Inst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
Inst.addOperand(MCOperand::CreateExpr(HiExpr));
|
|
getStreamer().EmitInstruction(Inst, STI);
|
|
Inst.clear();
|
|
|
|
// addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
|
|
Inst.setOpcode(Mips::ADDiu);
|
|
Inst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
Inst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
Inst.addOperand(MCOperand::CreateExpr(LoExpr));
|
|
getStreamer().EmitInstruction(Inst, STI);
|
|
Inst.clear();
|
|
|
|
// daddu $gp, $gp, $funcreg
|
|
Inst.setOpcode(Mips::DADDu);
|
|
Inst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
Inst.addOperand(MCOperand::CreateReg(Mips::GP));
|
|
Inst.addOperand(MCOperand::CreateReg(RegNo));
|
|
getStreamer().EmitInstruction(Inst, STI);
|
|
|
|
setCanHaveModuleDir(false);
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitMipsAbiFlags() {
|
|
MCAssembler &MCA = getStreamer().getAssembler();
|
|
MCContext &Context = MCA.getContext();
|
|
MCStreamer &OS = getStreamer();
|
|
const MCSectionELF *Sec =
|
|
Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS,
|
|
ELF::SHF_ALLOC, SectionKind::getMetadata(), 24, "");
|
|
MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
|
|
ABIShndxSD.setAlignment(8);
|
|
OS.SwitchSection(Sec);
|
|
|
|
OS << ABIFlagsSection;
|
|
}
|
|
|
|
void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
|
|
bool IsO32ABI) {
|
|
MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
|
|
|
|
ABIFlagsSection.OddSPReg = Enabled;
|
|
}
|