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intrinsics. The second instruction(s) to be handled are the vector versions of count set bits (ctpop). The changes here are to clang so that it generates a target independent vector ctpop when it sees an ARM dependent vector bits set count. The changes in llvm are to match the target independent vector ctpop and in VMCore/AutoUpgrade.cpp to update any existing bc files containing ARM dependent vector pop counts with target-independent ctpops. There are also changes to an existing test case in llvm for ARM vector count instructions and to a test for the bitcode upgrade. <rdar://problem/11892519> There is deliberately no test for the change to clang, as so far as I know, no consensus has been reached regarding how to test neon instructions in clang; q.v. <rdar://problem/8762292> llvm-svn: 160410 |
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| .. | ||
| 2006-12-11-Cast-ConstExpr.ll | ||
| 2009-06-11-FirstClassAggregateConstant.ll | ||
| 2012-05-07-SwitchInstRangesSupport.ll | ||
| arm32_neon_vcnt_upgrade.ll | ||
| attributes.ll | ||
| blockaddress.ll | ||
| extractelement.ll | ||
| flags.ll | ||
| lit.local.cfg | ||
| metadata-2.ll | ||
| metadata.ll | ||
| null-type.ll | ||
| null-type.ll.bc | ||
| ptest-new.ll | ||
| ptest-old.ll | ||
| shuffle.ll | ||
| ssse3_palignr.ll | ||