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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 14:33:02 +02:00
llvm-mirror/test/CodeGen
Elena Demikhovsky 1ed7ba869f AVX-512: fixed a bug in i1 vectors lowering
llvm-svn: 236947
2015-05-10 10:33:32 +00:00
..
AArch64 llvm/test/CodeGen/AArch64/tailcall_misched_graph.ll: s/REQUIRE/REQUIRES/ 2015-05-09 05:59:00 +00:00
ARM [Fast-ISel] Don't mark the first use of a remat constant as killed. 2015-05-09 00:51:03 +00:00
BPF
CPP
Generic Extend the statepoint intrinsic to allow statepoints to be marked as transitions from GC-aware code to code that is not GC-aware. 2015-05-08 18:07:42 +00:00
Hexagon [Hexagon] Generate more hardware loops 2015-05-08 20:18:21 +00:00
Inputs IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
Mips [mips] Emit the .insn directive for empty basic blocks. 2015-05-08 09:10:15 +00:00
MSP430
NVPTX [NVPTX] Handle addrspacecast constant expressions in aggregate initializers 2015-04-28 17:18:30 +00:00
PowerPC Fix test added in r236850 for OSX builders. 2015-05-08 14:04:54 +00:00
R600 R600/SI: Add VCC as an implict def of SI_KILL 2015-05-01 03:44:09 +00:00
SPARC
SystemZ [DAGCombiner] Account for getVectorIdxTy() when narrowing vector load 2015-05-05 19:34:10 +00:00
Thumb IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
Thumb2 Thumb2SizeReduction: Check the correct set of registers for LDMIA. 2015-05-05 20:07:10 +00:00
WinEH Flip r236172 testcase RUN option ordering for BSD sed(1). NFC. 2015-04-30 00:07:34 +00:00
X86 AVX-512: fixed a bug in i1 vectors lowering 2015-05-10 10:33:32 +00:00
XCore IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00