Matt Arsenault 1f67d9e8d9 AMDGPU: Fix verifier errors with undef vector indices ... Also fix pointlessly adding exec to liveins. llvm-svn: 273916		2016-06-27 19:57:44 +00:00
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AArch64	MachineScheduler: Fully compare top/bottom candidates	2016-06-25 00:23:00 +00:00
AMDGPU	AMDGPU: Fix verifier errors with undef vector indices	2016-06-27 19:57:44 +00:00
ARM	Add support for musl-libc on ARM Linux.	2016-06-24 21:14:33 +00:00
BPF
Generic
Hexagon	[Hexagon] Equally-sized vectors are equivalent in ISel (except vNi1)	2016-06-27 15:08:22 +00:00
Inputs
Lanai
Mips	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
MIR	[mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores.	2016-06-16 10:20:59 +00:00
MSP430
NVPTX	[NVPTX] Improve lowering of byval args of device functions.	2016-06-21 20:30:26 +00:00
PowerPC	MachineScheduler: Fully compare top/bottom candidates	2016-06-25 00:23:00 +00:00
SPARC	Codegen: Fix broken assumption in Tail Merge.	2016-06-24 18:16:36 +00:00
SystemZ	[SystemZ] Avoid generating 2 XOR instructions for (and (xor x, -1), y)	2016-06-27 15:55:30 +00:00
Thumb	[Thumb] Fix off-by-one error in r272007	2016-06-14 13:33:07 +00:00
Thumb2	Codegen: Fix broken assumption in Tail Merge.	2016-06-24 18:16:36 +00:00
WebAssembly
WinEH
X86	X86 Lowering - Fixed a crash in ICMP scalar instruction	2016-06-27 18:07:16 +00:00
XCore	IR: Introduce Module::global_objects().	2016-06-22 20:29:42 +00:00