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71 lines
1.5 KiB
Plaintext
71 lines
1.5 KiB
Plaintext
//===---------------------------------------------------------------------===//
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// Random ideas for the ARM backend.
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//===---------------------------------------------------------------------===//
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Consider implementing a select with two conditional moves:
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cmp x, y
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moveq dst, a
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movne dst, b
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----------------------------------------------------------
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%tmp1 = shl int %b, ubyte %c
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%tmp4 = add int %a, %tmp1
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compiles to
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add r0, r0, r1, lsl r2
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but
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%tmp1 = shl int %b, ubyte %c
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%tmp4 = add int %tmp1, %a
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compiles to
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mov r1, r1, lsl r2
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add r0, r1, r0
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---------------------------------------------------------
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%tmp1 = shl int %b, ubyte 4
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%tmp2 = add int %a, %tmp1
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compiles to
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mov r2, #4
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add r0, r0, r1, lsl r2
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should be
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add r0, r0, r1, lsl #4
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----------------------------------------------------------
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add an offset to FLDS/FLDD/FSTD/FSTS addressing mode
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----------------------------------------------------------
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the function
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void %f() {
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entry:
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call void %g( int 1, int 2, int 3, int 4, int 5 )
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ret void
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}
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declare void %g(int, int, int, int, int)
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Only needs 8 bytes of stack space. We currently allocate 16.
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----------------------------------------------------------
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32 x 32 -> 64 multiplications currently uses two instructions. We
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should try to declare smull and umull as returning two values.
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----------------------------------------------------------
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Implement addressing modes 2 (ldrb) and 3 (ldrsb)
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----------------------------------------------------------
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