Chris Dewhurst 1fde07b2dc This change adds co-processor condition branching and conditional traps to the Sparc back-end. ... This will allow inline assembler code to utilize these features, but no automatic lowering is provided, except for the previously provided @llvm.trap, which lowers to "ta 5". The change also separates out the different assembly language syntaxes for V8 and V9 Sparc. Previously, only V9 Sparc assembly syntax was provided. The change also corrects the selection order of trap disassembly, allowing, e.g. "ta %g0 + 15" to be rendered, more readably, as "ta 15", ignoring the %g0 register. This is per the sparc v8 and v9 manuals. Check-in includes many extra unit tests to check this works correctly on both V8 and V9 Sparc processors. Code Reviewed at http://reviews.llvm.org/D17960. llvm-svn: 263044		2016-03-09 18:20:21 +00:00
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lit.local.cfg
sparc64-alu-instructions.s
sparc64-ctrl-instructions.s	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
sparc-alu-instructions.s	[SPARC] Add mulscc.	2015-09-17 20:54:26 +00:00
sparc-asm-errors.s	[Sparc]: correct the 'set' synthetic instruction	2015-08-20 16:16:16 +00:00
sparc-assembly-exprs.s	Update test to take into account for r251271.	2015-10-26 03:34:29 +00:00
sparc-atomic-instructions.s	[Sparc]: asm-only support for the ldstub instruction.	2015-08-19 19:30:57 +00:00
sparc-coproc.s	Addition of tests to previous check-in. Tests for coprocessor register usage in Sparc.	2016-02-27 12:52:26 +00:00
sparc-ctrl-instructions.s	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
sparc-directive-xword.s	[SPARC] Don't compare arch name as a string, use the enum instead.	2015-08-06 15:44:12 +00:00
sparc-directives.s
sparc-fp-instructions.s	The patch adds missing registers and instructions to complete all the registers supported by the Sparc v8 manual.	2016-02-27 12:49:59 +00:00
sparc-little-endian.s
sparc-mem-instructions.s	[Sparc] Implement i64 load/store support for 32-bit sparc.	2015-08-10 19:11:39 +00:00
sparc-nop-data.s
sparc-pic.s	Fix relocation used for GOT references in non-PIC mode. Fix relocations	2015-10-01 22:08:20 +00:00
sparc-relocations.s	Fix CHECK directives that weren't checking.	2015-08-31 21:10:35 +00:00
sparc-special-registers.s	The patch adds missing registers and instructions to complete all the registers supported by the Sparc v8 manual.	2016-02-27 12:49:59 +00:00
sparc-synthetic-instructions.s	[Sparc]: correct the 'set' synthetic instruction	2015-08-20 16:16:16 +00:00
sparc-traps.s	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
sparc-v9-traps.s	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
sparc-vis.s
sparcv8-instructions.s
sparcv9-atomic-instructions.s
sparcv9-instructions.s	[SPARCv9] Add support for the rdpr/wrpr instructions.	2015-10-04 09:11:22 +00:00