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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/lib/Target/PowerPC
Chris Lattner 208da25af0 Match another form of eqv
llvm-svn: 21413
2005-04-21 21:09:11 +00:00
..
.cvsignore ignore generated files. 2004-11-21 00:00:54 +00:00
LICENSE.TXT
Makefile Specify all of the targets built. 2004-12-16 17:26:44 +00:00
PowerPC.h Make pattern isel default for ppc 2005-04-15 22:12:16 +00:00
PowerPC.td Factor out common .td file chunks. 2004-12-16 16:31:57 +00:00
PowerPCAsmPrinter.cpp Add the necessary support to codegen condition register logical ops with 2005-04-14 03:20:38 +00:00
PowerPCBranchSelector.cpp
PowerPCFrameInfo.h
PowerPCInstrBuilder.h
PowerPCInstrFormats.td switch over the rest of the formats that use RC to use isDOT 2005-04-19 05:21:30 +00:00
PowerPCInstrInfo.h Get rid of flags that are dead 2004-11-23 20:37:41 +00:00
PowerPCInstrInfo.td switch over the rest of the formats that use RC to use isDOT 2005-04-19 05:21:30 +00:00
PowerPCJITInfo.h This method is dead 2004-11-23 18:47:55 +00:00
PowerPCRegisterInfo.td
PowerPCTargetMachine.cpp Make pattern isel default for ppc 2005-04-15 22:12:16 +00:00
PowerPCTargetMachine.h Remove the ISel->AsmPrinter link via the TargetMachine that was put in 2004-11-27 04:45:11 +00:00
PPC32.td Factor out common .td file chunks. 2004-12-16 16:31:57 +00:00
PPC32CodeEmitter.cpp Add completely untested support for mtcrf/mfcrf encoding 2005-04-19 05:41:52 +00:00
PPC32InstrInfo.cpp Initial support for allocation condition registers 2005-04-12 07:04:16 +00:00
PPC32InstrInfo.h
PPC32ISelPattern.cpp Match another form of eqv 2005-04-21 21:09:11 +00:00
PPC32ISelSimple.cpp Add the necessary support to codegen condition register logical ops with 2005-04-14 03:20:38 +00:00
PPC32JITInfo.cpp There is no reason to store <x,x>, just store <x>. 2004-11-26 20:25:17 +00:00
PPC32JITInfo.h Implement all of the methods 2004-11-23 05:57:57 +00:00
PPC32RegisterInfo.cpp Initial support for allocation condition registers 2005-04-12 07:04:16 +00:00
PPC32RegisterInfo.h
PPC32RegisterInfo.td Initial support for allocation condition registers 2005-04-12 07:04:16 +00:00
PPC32Relocations.h * Rename existing relocations to be more specific 2004-11-24 22:30:08 +00:00
PPC32TargetMachine.h Move JITInfo from PPCTM to PPC32TM 2004-11-23 05:56:40 +00:00
PPC64.td Factor out common .td file chunks. 2004-12-16 16:31:57 +00:00
PPC64CodeEmitter.cpp getJITStubForFunction is optional and unimplemented, just remove it. 2004-11-20 04:14:44 +00:00
PPC64InstrInfo.cpp
PPC64InstrInfo.h
PPC64ISelPattern.cpp Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit 2005-04-13 02:40:26 +00:00
PPC64JITInfo.h getJITStubForFunction is optional and unimplemented, just remove it. 2004-11-20 04:14:44 +00:00
PPC64RegisterInfo.cpp
PPC64RegisterInfo.h
PPC64RegisterInfo.td
PPC64TargetMachine.h
README.txt Update PPC readme. Remove things that are done or aren't ppc specific 2005-04-11 20:48:57 +00:00

TODO:
* condition register allocation
* gpr0 allocation
* implement do-loop -> bdnz transform
* implement powerpc-64 for darwin
* use stfiwx in float->int
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests that should pass:
* MultiSource
  |- Applications
  |  `- hbd: miscompilation