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3f12ce1fd4
SCEVExpander::replaceCongruentIVs assumes the backedge value of an SCEV-analysable PHI to always be an instruction, when this is not necessarily true. For now address this by bailing out of the optimization if the backedge value of the PHI is a non-Instruction. llvm-svn: 269213
112 lines
2.3 KiB
LLVM
112 lines
2.3 KiB
LLVM
; RUN: opt -S -indvars < %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.11.0"
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; SCEVExpander would try to RAUW %val_2 with %c.lcssa, breaking "def
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; dominates uses".
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define void @pr27232(i32 %val) {
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; CHECK-LABEL: @pr27232(
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entry:
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br i1 undef, label %loop_0.cond, label %for.body.us
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for.body.us:
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br label %loop_0.cond
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loop_0.cond:
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%val_2 = phi i32 [ %val, %for.body.us ], [ undef, %entry ]
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br i1 true, label %loop_0.ph, label %loop_1.ph
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loop_0.ph:
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br label %loop_0
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loop_1.exit:
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br label %loop_1.ph
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loop_1.ph:
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%c.lcssa = phi i32 [ 0, %loop_0.cond ], [ %val_2, %loop_1.exit ]
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br label %loop_1
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loop_0:
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br i1 undef, label %loop_0, label %loop_1.exit
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loop_1:
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%d.1 = phi i32 [ %c.lcssa, %loop_1 ], [ %val_2, %loop_1.ph ]
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%t.1 = phi i32 [ %val_2, %loop_1 ], [ %c.lcssa, %loop_1.ph ]
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br i1 undef, label %leave, label %loop_1
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leave:
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ret void
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}
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; @ReplaceArg_0 and @ReplaceArg_1 used to trigger a failed cast<>
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; assertion in SCEVExpander.
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define void @ReplaceArg_0(i32 %val) {
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; CHECK-LABEL: @ReplaceArg_0(
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entry:
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br i1 undef, label %loop_0.cond, label %for.body.us
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for.body.us:
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br label %loop_0.cond
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loop_0.cond:
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br i1 true, label %loop_0.ph, label %loop_1.ph
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loop_0.ph:
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br label %loop_0
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loop_1.exit:
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br label %loop_1.ph
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loop_1.ph:
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%c.lcssa = phi i32 [ 0, %loop_0.cond ], [ %val, %loop_1.exit ]
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br label %loop_1
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loop_0:
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br i1 undef, label %loop_0, label %loop_1.exit
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loop_1:
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%d.1 = phi i32 [ %c.lcssa, %loop_1 ], [ %val, %loop_1.ph ]
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%t.1 = phi i32 [ %val, %loop_1 ], [ %c.lcssa, %loop_1.ph ]
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br i1 undef, label %leave, label %loop_1
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leave:
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ret void
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}
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define void @ReplaceArg_1(i32 %val) {
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; CHECK-LABEL: @ReplaceArg_1(
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entry:
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br i1 undef, label %loop_0.cond, label %for.body.us
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for.body.us:
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br label %loop_0.cond
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loop_0.cond:
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br i1 true, label %loop_0.ph, label %loop_1.ph
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loop_0.ph:
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br label %loop_0
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loop_1.exit:
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br label %loop_1.ph
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loop_1.ph:
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%c.lcssa = phi i32 [ 0, %loop_0.cond ], [ %val, %loop_1.exit ]
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br label %loop_1
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loop_0:
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br i1 undef, label %loop_0, label %loop_1.exit
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loop_1:
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%t.1 = phi i32 [ %val, %loop_1 ], [ %c.lcssa, %loop_1.ph ]
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%d.1 = phi i32 [ %c.lcssa, %loop_1 ], [ %val, %loop_1.ph ]
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br i1 undef, label %leave, label %loop_1
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leave:
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ret void
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}
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