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fa6e1c461b
This change implements the transformation in processInstruction() for the LDR rt, =expression to MOV rt, expression when the expression can be evaluated and can fit into the immediate field of the MOV or a MVN. Across the ARM and Thumb instruction sets there are several cases to consider, each with a different range of representatble constants. In ARM we have: * Modified immediate (All ARM architectures) * MOVW (v6t2 and above) In Thumb we have: * Modified immediate (v6t2, v7m and v8m.mainline) * MOVW (v6t2, v7m, v8.mainline and v8m.baseline) * Narrow Thumb MOV that can be used in an IT block (non flag-setting) If the immediate fits any of the available alternatives then we make the transformation. Fixes 25722. Patch by Peter Smith. llvm-svn: 269354
22 lines
1.2 KiB
ArmAsm
22 lines
1.2 KiB
ArmAsm
@RUN: llvm-mc -triple armv5-unknown-linux-gnueabi %s | FileCheck --check-prefix=CHECK-ARM %s
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@RUN: not llvm-mc -triple thumbv7-unknown-linux-gnueabi %s 2>&1 | FileCheck --check-prefix=CHECK-SP %s
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@RUN: not llvm-mc -triple thumbv5-unknown-linux-gnueabi %s 2>&1 | FileCheck --check-prefix=CHECK-NONE %s
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@RUN: llvm-mc -triple armv5-base-apple-darwin %s | FileCheck --check-prefix=CHECK-DARWIN-ARM %s
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@RUN: not llvm-mc -triple thumbv7-base-apple-darwin %s 2>&1 | FileCheck --check-prefix=CHECK-DARWIN-SP %s
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@RUN: not llvm-mc -triple thumbv5-base.apple.darwin %s 2>&1 | FileCheck --check-prefix=CHECK-NONE %s
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@ We dont't do the transformation for rt = sp or pc
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@ as it is unpredictable for many of the MOV encondings
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ldr pc, = 0x4
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@ CHECK-ARM: ldr pc, .Ltmp[[TMP0:[0-9]+]]
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@ CHECK-DARWIN-ARM: ldr pc, Ltmp0
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@ CHECK-SP: error: instruction requires: arm-mode
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@ CHECK-DARWIN-SP: error: instruction requires: arm-mode
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@ CHECK-NONE: error: instruction requires: arm-mode
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ldr sp, = 0x8
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@ CHECK-ARM: ldr sp, .Ltmp[[TMP1:[0-9]+]]
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@ CHECK-DARWIN-ARM: ldr sp, Ltmp1
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@ CHECK-SP: ldr.w sp, .Ltmp[[TMP0:[0-9]+]]
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@ CHECK-DARWIN-SP: ldr.w sp, Ltmp0
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@ CHECK-NONE: error: instruction requires: arm-mode
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