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https://github.com/RPCS3/llvm-mirror.git
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f3dbbac126
Summary: Previosly we simply always said that `SCEVMinMaxExpr` is too costly to expand. But this isn't really true, it expands into just a comparison+swap pair. And again much like with add/mul, there will be one less such pair than the number of operands. And we need to count the cost of operands themselves. This does change a number of testcases, and as far as i can tell, all of these changes are improvements, in the sense that we fixed up more latches to do the [in]equality comparison. This concludes cost-modelling changes, no other SCEV expressions exist as of now. This is a part of addressing [[ https://bugs.llvm.org/show_bug.cgi?id=44668 | PR44668 ]]. Reviewers: reames, mkazantsev, wmi, sanjoy Reviewed By: mkazantsev Subscribers: hiraditya, javed.absar, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73744
338 lines
14 KiB
LLVM
338 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -indvars -S -indvars-predicate-loops=0 | FileCheck %s
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; Make sure that indvars can perform LFTR without a canonical IV.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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; Perform LFTR using the original pointer-type IV.
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declare void @use(double %x)
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; for(char* p = base; p < base + n; ++p) {
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; *p = p-base;
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; }
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define void @ptriv(i8* %base, i32 %n) nounwind {
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; CHECK-LABEL: @ptriv(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[N:%.*]] to i64
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; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[BASE:%.*]], i64 [[IDX_EXT]]
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8* [[BASE]], [[ADD_PTR]]
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; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
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; CHECK: for.body.preheader:
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[P_02:%.*]] = phi i8* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[BASE]], [[FOR_BODY_PREHEADER]] ]
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; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint i8* [[P_02]] to i64
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; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint i8* [[BASE]] to i64
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; CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
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; CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[SUB_PTR_SUB]] to i8
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; CHECK-NEXT: store i8 [[CONV]], i8* [[P_02]]
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; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[P_02]], i32 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8* [[INCDEC_PTR]], [[ADD_PTR]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
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; CHECK: for.end.loopexit:
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; CHECK-NEXT: br label [[FOR_END]]
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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%idx.ext = sext i32 %n to i64
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%add.ptr = getelementptr inbounds i8, i8* %base, i64 %idx.ext
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%cmp1 = icmp ult i8* %base, %add.ptr
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br i1 %cmp1, label %for.body, label %for.end
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for.body:
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%p.02 = phi i8* [ %base, %entry ], [ %incdec.ptr, %for.body ]
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; cruft to make the IV useful
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%sub.ptr.lhs.cast = ptrtoint i8* %p.02 to i64
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%sub.ptr.rhs.cast = ptrtoint i8* %base to i64
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%sub.ptr.sub = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast
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%conv = trunc i64 %sub.ptr.sub to i8
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store i8 %conv, i8* %p.02
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%incdec.ptr = getelementptr inbounds i8, i8* %p.02, i32 1
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%cmp = icmp ult i8* %incdec.ptr, %add.ptr
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br i1 %cmp, label %for.body, label %for.end
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for.end:
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ret void
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}
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; This test checks that SCEVExpander can handle an outer loop that has been
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; simplified, and as a result the inner loop's exit test will be rewritten.
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define void @expandOuterRecurrence(i32 %arg) nounwind {
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; CHECK-LABEL: @expandOuterRecurrence(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SUB1:%.*]] = sub nsw i32 [[ARG:%.*]], 1
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; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, [[SUB1]]
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; CHECK-NEXT: br i1 [[CMP1]], label [[OUTER_PREHEADER:%.*]], label [[EXIT:%.*]]
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; CHECK: outer.preheader:
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[ARG]], -1
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; CHECK-NEXT: br label [[OUTER:%.*]]
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; CHECK: outer:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[TMP0]], [[OUTER_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[OUTER_INC:%.*]] ]
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[I_INC:%.*]], [[OUTER_INC]] ], [ 0, [[OUTER_PREHEADER]] ]
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; CHECK-NEXT: [[SUB2:%.*]] = sub nsw i32 [[ARG]], [[I]]
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; CHECK-NEXT: [[SUB3:%.*]] = sub nsw i32 [[SUB2]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 0, [[SUB3]]
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; CHECK-NEXT: br i1 [[CMP2]], label [[INNER_PH:%.*]], label [[OUTER_INC]]
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; CHECK: inner.ph:
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; CHECK-NEXT: br label [[INNER:%.*]]
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; CHECK: inner:
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; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[INNER_PH]] ], [ [[J_INC:%.*]], [[INNER]] ]
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; CHECK-NEXT: [[J_INC]] = add nuw nsw i32 [[J]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[J_INC]], [[INDVARS_IV]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[INNER]], label [[OUTER_INC_LOOPEXIT:%.*]]
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; CHECK: outer.inc.loopexit:
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; CHECK-NEXT: br label [[OUTER_INC]]
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; CHECK: outer.inc:
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; CHECK-NEXT: [[I_INC]] = add nuw nsw i32 [[I]], 1
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i32 [[INDVARS_IV]], -1
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; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp ne i32 [[I_INC]], [[TMP0]]
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; CHECK-NEXT: br i1 [[EXITCOND1]], label [[OUTER]], label [[EXIT_LOOPEXIT:%.*]]
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; CHECK: exit.loopexit:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%sub1 = sub nsw i32 %arg, 1
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%cmp1 = icmp slt i32 0, %sub1
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br i1 %cmp1, label %outer, label %exit
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outer:
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%i = phi i32 [ 0, %entry ], [ %i.inc, %outer.inc ]
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%sub2 = sub nsw i32 %arg, %i
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%sub3 = sub nsw i32 %sub2, 1
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%cmp2 = icmp slt i32 0, %sub3
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br i1 %cmp2, label %inner.ph, label %outer.inc
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inner.ph:
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br label %inner
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inner:
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%j = phi i32 [ 0, %inner.ph ], [ %j.inc, %inner ]
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%j.inc = add nsw i32 %j, 1
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%cmp3 = icmp slt i32 %j.inc, %sub3
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br i1 %cmp3, label %inner, label %outer.inc
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outer.inc:
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%i.inc = add nsw i32 %i, 1
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%cmp4 = icmp slt i32 %i.inc, %sub1
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br i1 %cmp4, label %outer, label %exit
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exit:
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ret void
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}
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; Force SCEVExpander to look for an existing well-formed phi.
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; Perform LFTR without generating extra preheader code.
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define void @guardedloop([0 x double]* %matrix, [0 x double]* %vector,
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;
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; CHECK-LABEL: @guardedloop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 1, [[IROW:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_PREHEADER:%.*]], label [[RETURN:%.*]]
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; CHECK: loop.preheader:
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; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[ILEAD:%.*]] to i64
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; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[IROW]] to i64
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[INDVARS_IV2:%.*]] = phi i64 [ 0, [[LOOP_PREHEADER]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[LOOP_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], [[INDVARS_IV2]]
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; CHECK-NEXT: [[MATRIXP:%.*]] = getelementptr inbounds [0 x double], [0 x double]* [[MATRIX:%.*]], i32 0, i64 [[TMP1]]
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; CHECK-NEXT: [[V1:%.*]] = load double, double* [[MATRIXP]]
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; CHECK-NEXT: call void @use(double [[V1]])
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; CHECK-NEXT: [[VECTORP:%.*]] = getelementptr inbounds [0 x double], [0 x double]* [[VECTOR:%.*]], i32 0, i64 [[INDVARS_IV2]]
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; CHECK-NEXT: [[V2:%.*]] = load double, double* [[VECTORP]]
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; CHECK-NEXT: call void @use(double [[V2]])
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
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; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], [[WIDE_TRIP_COUNT]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[RETURN_LOOPEXIT:%.*]]
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; CHECK: return.loopexit:
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; CHECK-NEXT: br label [[RETURN]]
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; CHECK: return:
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; CHECK-NEXT: ret void
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;
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i32 %irow, i32 %ilead) nounwind {
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entry:
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%cmp = icmp slt i32 1, %irow
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br i1 %cmp, label %loop, label %return
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loop:
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%rowidx = phi i32 [ 0, %entry ], [ %row.inc, %loop ]
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%i = phi i32 [ 0, %entry ], [ %i.inc, %loop ]
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%diagidx = add nsw i32 %rowidx, %i
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%diagidxw = sext i32 %diagidx to i64
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%matrixp = getelementptr inbounds [0 x double], [0 x double]* %matrix, i32 0, i64 %diagidxw
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%v1 = load double, double* %matrixp
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call void @use(double %v1)
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%iw = sext i32 %i to i64
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%vectorp = getelementptr inbounds [0 x double], [0 x double]* %vector, i32 0, i64 %iw
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%v2 = load double, double* %vectorp
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call void @use(double %v2)
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%row.inc = add nsw i32 %rowidx, %ilead
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%i.inc = add nsw i32 %i, 1
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%cmp196 = icmp slt i32 %i.inc, %irow
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br i1 %cmp196, label %loop, label %return
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return:
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ret void
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}
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; Avoid generating extra code to materialize a trip count. Skip LFTR.
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define void @unguardedloop([0 x double]* %matrix, [0 x double]* %vector,
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;
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; CHECK-LABEL: @unguardedloop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i32 [[IROW:%.*]], 1
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; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP0]], i32 [[IROW]], i32 1
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; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[SMAX]] to i64
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[INDVARS_IV2:%.*]] = phi i64 [ [[INDVARS_IV_NEXT3:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], [[WIDE_TRIP_COUNT]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[RETURN:%.*]]
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; CHECK: return:
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; CHECK-NEXT: ret void
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;
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i32 %irow, i32 %ilead) nounwind {
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entry:
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br label %loop
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loop:
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%rowidx = phi i32 [ 0, %entry ], [ %row.inc, %loop ]
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%i = phi i32 [ 0, %entry ], [ %i.inc, %loop ]
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%diagidx = add nsw i32 %rowidx, %i
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%diagidxw = sext i32 %diagidx to i64
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%matrixp = getelementptr inbounds [0 x double], [0 x double]* %matrix, i32 0, i64 %diagidxw
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%v1 = load double, double* %matrixp
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%iw = sext i32 %i to i64
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%vectorp = getelementptr inbounds [0 x double], [0 x double]* %vector, i32 0, i64 %iw
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%v2 = load double, double* %vectorp
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%row.inc = add nsw i32 %rowidx, %ilead
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%i.inc = add nsw i32 %i, 1
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%cmp196 = icmp slt i32 %i.inc, %irow
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br i1 %cmp196, label %loop, label %return
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return:
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ret void
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}
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; Remove %i which is only used by the exit test.
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; Verify that SCEV can still compute a backedge count from the sign
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; extended %n, used for pointer comparison by LFTR.
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;
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; TODO: Fix for PR13371 currently makes this impossible. See
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; IndVarSimplify.cpp hasConcreteDef(). We may want to change to undef rules.
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define void @geplftr(i8* %base, i32 %x, i32 %y, i32 %n) nounwind {
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; CHECK-LABEL: @geplftr(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[X_EXT:%.*]] = sext i32 [[X:%.*]] to i64
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; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[BASE:%.*]], i64 [[X_EXT]]
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; CHECK-NEXT: [[Y_EXT:%.*]] = sext i32 [[Y:%.*]] to i64
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; CHECK-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[ADD_PTR]], i64 [[Y_EXT]]
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; CHECK-NEXT: [[LIM:%.*]] = add i32 [[X]], [[N:%.*]]
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; CHECK-NEXT: [[CMP_PH:%.*]] = icmp ult i32 [[X]], [[LIM]]
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; CHECK-NEXT: br i1 [[CMP_PH]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
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; CHECK: loop.preheader:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INC:%.*]], [[LOOP]] ], [ [[X]], [[LOOP_PREHEADER]] ]
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; CHECK-NEXT: [[APTR:%.*]] = phi i8* [ [[INCDEC_PTR:%.*]], [[LOOP]] ], [ [[ADD_PTR10]], [[LOOP_PREHEADER]] ]
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; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[APTR]], i32 1
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; CHECK-NEXT: store i8 3, i8* [[APTR]]
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; CHECK-NEXT: [[INC]] = add nuw i32 [[I]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], [[LIM]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
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; CHECK: exit.loopexit:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%x.ext = sext i32 %x to i64
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%add.ptr = getelementptr inbounds i8, i8* %base, i64 %x.ext
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%y.ext = sext i32 %y to i64
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%add.ptr10 = getelementptr inbounds i8, i8* %add.ptr, i64 %y.ext
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%lim = add i32 %x, %n
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%cmp.ph = icmp ult i32 %x, %lim
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br i1 %cmp.ph, label %loop, label %exit
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loop:
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%i = phi i32 [ %x, %entry ], [ %inc, %loop ]
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%aptr = phi i8* [ %add.ptr10, %entry ], [ %incdec.ptr, %loop ]
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%incdec.ptr = getelementptr inbounds i8, i8* %aptr, i32 1
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store i8 3, i8* %aptr
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%inc = add i32 %i, 1
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%cmp = icmp ult i32 %inc, %lim
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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; Exercise backedge taken count verification with a never-taken loop.
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define void @nevertaken() nounwind uwtable ssp {
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; CHECK-LABEL: @nevertaken(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: br i1 false, label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %inc, %loop ]
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%inc = add nsw i32 %i, 1
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%cmp = icmp sle i32 %inc, 0
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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; Test LFTR on an IV whose recurrence start is a non-unit pointer type.
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define void @aryptriv([256 x i8]* %base, i32 %n) nounwind {
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; CHECK-LABEL: @aryptriv(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[IVSTART:%.*]] = getelementptr inbounds [256 x i8], [256 x i8]* [[BASE:%.*]], i32 0, i32 0
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; CHECK-NEXT: [[IVEND:%.*]] = getelementptr inbounds [256 x i8], [256 x i8]* [[BASE]], i32 0, i32 [[N:%.*]]
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; CHECK-NEXT: [[CMP_PH:%.*]] = icmp ult i8* [[IVSTART]], [[IVEND]]
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; CHECK-NEXT: br i1 [[CMP_PH]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
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; CHECK: loop.preheader:
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; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[N]] to i64
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr [256 x i8], [256 x i8]* [[BASE]], i64 0, i64 [[TMP0]]
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[APTR:%.*]] = phi i8* [ [[INCDEC_PTR:%.*]], [[LOOP]] ], [ [[IVSTART]], [[LOOP_PREHEADER]] ]
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; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[APTR]], i32 1
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; CHECK-NEXT: store i8 3, i8* [[APTR]]
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8* [[INCDEC_PTR]], [[SCEVGEP]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
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; CHECK: exit.loopexit:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%ivstart = getelementptr inbounds [256 x i8], [256 x i8]* %base, i32 0, i32 0
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%ivend = getelementptr inbounds [256 x i8], [256 x i8]* %base, i32 0, i32 %n
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%cmp.ph = icmp ult i8* %ivstart, %ivend
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br i1 %cmp.ph, label %loop, label %exit
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loop:
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%aptr = phi i8* [ %ivstart, %entry ], [ %incdec.ptr, %loop ]
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%incdec.ptr = getelementptr inbounds i8, i8* %aptr, i32 1
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store i8 3, i8* %aptr
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%cmp = icmp ult i8* %incdec.ptr, %ivend
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br i1 %cmp, label %loop, label %exit
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|
|
exit:
|
|
ret void
|
|
}
|