1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen
Dale Johannesen 20e1cd09ba Emit correct code when making a ConstantPool entry for a vector
constant whose component type is not a legal type for the target.
(If the target ConstantPool cannot handle this type either, it has
an opportunity to merge elements.  In practice any target with
8-bit bytes must support i8 *as data*).  7320806 (partial).

llvm-svn: 86751
2009-11-10 23:16:41 +00:00
..
Alpha
ARM Use Unified Assembly Syntax for the ARM backend. 2009-11-09 00:11:35 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic Fix PR5421 by APInt'izing switch lowering. 2009-11-07 07:50:34 +00:00
Mips
MSP430 Add and-not (bic) patterns. Based heavily on patch by Brian Lucas! 2009-11-08 15:33:12 +00:00
PIC16
PowerPC Emit correct code when making a ConstantPool entry for a vector 2009-11-10 23:16:41 +00:00
SPARC
SystemZ
Thumb Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic. 2009-11-07 04:04:34 +00:00
Thumb2 Update test 2009-11-09 22:59:01 +00:00
X86 Add testcase for recent checkin. 2009-11-09 23:10:49 +00:00
XCore