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c43ce3d9fa
For multiprecision arithmetic on MIPS, rather than using ISD::ADDE / ISD::ADDC,
get SelectionDAG to break down the operation into ISD::ADDs and ISD::SETCCs.
For MIPS, only the DSP ASE has a carry flag, so in the general case it is not
useful to directly support ISD::{ADDE, ADDC, SUBE, SUBC} nodes.
Also improve the generation code in such cases for targets with
TargetLoweringBase::ZeroOrOneBooleanContent by directly using the result of the
comparison node rather than using it in selects. Similarly for ISD::SUBE /
ISD::SUBC.
Address optimization breakage by moving the generation of MIPS specific integer
multiply-accumulate nodes to before legalization.
This revolves PR32713 and PR33424.
Thanks to Simonas Kazlauskas and Pirama Arumuga Nainar for reporting the issue!
Reviewers: slthakur
Differential Revision: https://reviews.llvm.org/D33494
The previous version of this patch was too aggressive in producing fused
integer multiple-addition instructions.
llvm-svn: 307906
148 lines
6.0 KiB
C++
148 lines
6.0 KiB
C++
//===-- MipsSEISelDAGToDAG.h - A Dag to Dag Inst Selector for MipsSE -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Subclass of MipsDAGToDAGISel specialized for mips32/64.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
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#define LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
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#include "MipsISelDAGToDAG.h"
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namespace llvm {
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class MipsSEDAGToDAGISel : public MipsDAGToDAGISel {
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public:
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explicit MipsSEDAGToDAGISel(MipsTargetMachine &TM, CodeGenOpt::Level OL)
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: MipsDAGToDAGISel(TM, OL) {}
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private:
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bool runOnMachineFunction(MachineFunction &MF) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI,
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MachineFunction &MF);
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unsigned getMSACtrlReg(const SDValue RegIdx) const;
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bool replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&);
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std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc,
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const SDLoc &dl, EVT Ty, bool HasLo,
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bool HasHi);
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void selectAddE(SDNode *Node, const SDLoc &DL) const;
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bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const;
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bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset,
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unsigned OffsetBits,
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unsigned ShiftAmount) const;
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bool selectAddrRegImm(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectAddrDefault(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddr(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectAddrRegImm9(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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bool selectAddrRegImm11(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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bool selectAddrRegImm12(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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bool selectAddrRegImm16(SDValue Addr, SDValue &Base,
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SDValue &Offset) const;
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bool selectIntAddr11MM(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddr12MM(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddr16MM(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddrSImm10(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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bool selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base,
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SDValue &Offset) const override;
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/// \brief Select constant vector splats.
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bool selectVSplat(SDNode *N, APInt &Imm,
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unsigned MinSizeInBits) const override;
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/// \brief Select constant vector splats whose value fits in a given integer.
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bool selectVSplatCommon(SDValue N, SDValue &Imm, bool Signed,
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unsigned ImmBitSize) const;
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/// \brief Select constant vector splats whose value fits in a uimm1.
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bool selectVSplatUimm1(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm2.
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bool selectVSplatUimm2(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm3.
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bool selectVSplatUimm3(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm4.
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bool selectVSplatUimm4(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm5.
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bool selectVSplatUimm5(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm6.
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bool selectVSplatUimm6(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a uimm8.
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bool selectVSplatUimm8(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value fits in a simm5.
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bool selectVSplatSimm5(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value is a power of 2.
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bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value is the inverse of a
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/// power of 2.
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bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value is a run of set bits
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/// ending at the most significant bit
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bool selectVSplatMaskL(SDValue N, SDValue &Imm) const override;
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/// \brief Select constant vector splats whose value is a run of set bits
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/// starting at bit zero.
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bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override;
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bool trySelect(SDNode *Node) override;
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void processFunctionAfterISel(MachineFunction &MF) override;
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// Insert instructions to initialize the global base register in the
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// first MBB of the function.
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void initGlobalBaseReg(MachineFunction &MF);
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bool SelectInlineAsmMemoryOperand(const SDValue &Op,
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unsigned ConstraintID,
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std::vector<SDValue> &OutOps) override;
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};
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FunctionPass *createMipsSEISelDag(MipsTargetMachine &TM,
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CodeGenOpt::Level OptLevel);
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}
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#endif
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