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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/lib/CodeGen
2006-09-09 06:03:30 +00:00
..
SelectionDAG Implement the fpowi now by lowering to a libcall 2006-09-09 06:03:30 +00:00
AsmPrinter.cpp Make target asm info a property of the target machine. 2006-09-07 22:06:40 +00:00
BranchFolding.cpp
DwarfWriter.cpp Make target asm info a property of the target machine. 2006-09-07 22:06:40 +00:00
ELFWriter.cpp
IntrinsicLowering.cpp
LiveInterval.cpp
LiveIntervalAnalysis.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
LiveVariables.cpp Only call isUse/isDef on register operands 2006-09-05 20:19:27 +00:00
LLVMTargetMachine.cpp add setJumpBufSize() and setJumpBufAlignment() to target-lowering. 2006-09-04 06:21:35 +00:00
MachineBasicBlock.cpp
MachineDebugInfo.cpp
MachineFunction.cpp
MachineInstr.cpp Only call isUse/isDef on register operands 2006-09-05 20:19:27 +00:00
MachinePassRegistry.cpp
MachOWriter.cpp First pass at supporting relocations. Relocations are written correctly to 2006-09-08 22:42:09 +00:00
Makefile
Passes.cpp
PHIElimination.cpp
PhysRegTracker.h
PrologEpilogInserter.cpp
RegAllocLinearScan.cpp
RegAllocLocal.cpp Non-allocatable physregs can be killed and dead, but don't treat them as 2006-09-08 20:21:31 +00:00
RegAllocSimple.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
TwoAddressInstructionPass.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
UnreachableBlockElim.cpp
VirtRegMap.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
VirtRegMap.h Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00