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This patch changes how instruction execution is orchestrated by the Pipeline. In particular, this patch makes it more explicit how instructions transition through the various pipeline stages during execution. The main goal is to simplify both the stage API and the Pipeline execution. At the same time, this patch fixes some design issues which are currently latent, but that are likely to cause problems in future if people start defining custom pipelines. The new design assumes that each pipeline stage knows the "next-in-sequence". The Stage API has gained three new methods: - isAvailable(IR) - checkNextStage(IR) - moveToTheNextStage(IR). An instruction IR can be executed by a Stage if method `Stage::isAvailable(IR)` returns true. Instructions can move to next stages using method moveToTheNextStage(IR). An instruction cannot be moved to the next stage if method checkNextStage(IR) (called on the current stage) returns false. Stages are now responsible for moving instructions to the next stage in sequence if necessary. Instructions are allowed to transition through multiple stages during a single cycle (as long as stages are available, and as long as all the calls to `checkNextStage(IR)` returns true). Methods `Stage::preExecute()` and `Stage::postExecute()` have now become redundant, and those are removed by this patch. Method Pipeline::runCycle() is now simpler, and it correctly visits stages on every begin/end of cycle. Other changes: - DispatchStage no longer requires a reference to the Scheduler. - ExecuteStage no longer needs to directly interact with the RetireControlUnit. Instead, executed instructions are now directly moved to the next stage (i.e. the retire stage). - RetireStage gained an execute method. This allowed us to remove the dependency with the RCU in ExecuteStage. - FecthStage now updates the "program counter" during cycleBegin() (i.e. before we start executing new instructions). - We no longer need Stage::Status to be returned by method execute(). It has been dropped in favor of a more lightweight llvm::Error. Overally, I measured a ~11% performance gain w.r.t. the previous design. I also think that the Stage interface is probably easier to read now. That being said, code comments have to be improved, and I plan to do it in a follow-up patch. Differential revision: https://reviews.llvm.org/D50849 llvm-svn: 339923
77 lines
2.5 KiB
C++
77 lines
2.5 KiB
C++
//===--------------------- Pipeline.h ---------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements an ordered container of stages that simulate the
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/// pipeline of a hardware backend.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TOOLS_LLVM_MCA_PIPELINE_H
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#define LLVM_TOOLS_LLVM_MCA_PIPELINE_H
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#include "Scheduler.h"
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#include "Stage.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Support/Error.h"
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namespace mca {
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class HWEventListener;
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class HWInstructionEvent;
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class HWStallEvent;
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/// A pipeline for a specific subtarget.
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///
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/// It emulates an out-of-order execution of instructions. Instructions are
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/// fetched from a MCInst sequence managed by an initial 'Fetch' stage.
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/// Instructions are firstly fetched, then dispatched to the schedulers, and
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/// then executed.
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///
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/// This class tracks the lifetime of an instruction from the moment where
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/// it gets dispatched to the schedulers, to the moment where it finishes
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/// executing and register writes are architecturally committed.
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/// In particular, it monitors changes in the state of every instruction
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/// in flight.
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///
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/// Instructions are executed in a loop of iterations. The number of iterations
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/// is defined by the SourceMgr object, which is managed by the initial stage
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/// of the instruction pipeline.
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///
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/// The Pipeline entry point is method 'run()' which executes cycles in a loop
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/// until there are new instructions to dispatch, and not every instruction
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/// has been retired.
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///
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/// Internally, the Pipeline collects statistical information in the form of
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/// histograms. For example, it tracks how the dispatch group size changes
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/// over time.
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class Pipeline {
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Pipeline(const Pipeline &P) = delete;
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Pipeline &operator=(const Pipeline &P) = delete;
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/// An ordered list of stages that define this instruction pipeline.
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llvm::SmallVector<std::unique_ptr<Stage>, 8> Stages;
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std::set<HWEventListener *> Listeners;
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unsigned Cycles;
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llvm::Error runCycle();
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bool hasWorkToProcess();
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void notifyCycleBegin();
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void notifyCycleEnd();
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public:
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Pipeline() : Cycles(0) {}
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void appendStage(std::unique_ptr<Stage> S);
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llvm::Error run();
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void addEventListener(HWEventListener *Listener);
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};
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} // namespace mca
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#endif // LLVM_TOOLS_LLVM_MCA_PIPELINE_H
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