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edcf928591
Summary: This implements the lowering of the X constraint on AArch64. The default behaviour of the X constraint lowering is to restrict it to "f". This is a problem because the "f" constraint is not implemented on AArch64 and would be too restrictive anyway. Therefore, the AArch64 hook will lower this to "w" (if the operand is a floating point or vector) or "r" otherwise. The implementation is similar with the one added for ARM (r267411). This is the AArch64 side of the fix for http://llvm.org/PR26493 Reviewers: rengolin Subscribers: aemerson, rengolin, llvm-commits, t.p.northover Differential Revision: http://reviews.llvm.org/D19967 llvm-svn: 268907
18 lines
477 B
LLVM
18 lines
477 B
LLVM
; RUN: llc -mtriple=aarch64-none-eabi -mattr=-fp-armv8 %s -o - | FileCheck %s -check-prefix=nofp
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; In the novfp case, the compiler is forced to assign a core register,
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; even if the input is a float.
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; nofp-LABEL: f1
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; nofp-CHECK: ldr x0, [sp]
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; This can be generated by a function such as:
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; void f1(float f) {asm volatile ("ldr $0, [sp]" : : "X" (f));}
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define void @f1(float %f) {
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entry:
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call void asm sideeffect "ldr $0, [sp]", "X" (float %f) nounwind
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ret void
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}
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