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https://github.com/RPCS3/llvm-mirror.git
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370 lines
9.4 KiB
LLVM
370 lines
9.4 KiB
LLVM
; RUN: llc -march=mipsel < %s | FileCheck %s
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; RUN: llc -march=mipsel -mattr=+fp64 < %s | FileCheck %s
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; RUN: llc -march=mipsel < %s | FileCheck -check-prefix=FP32EL %s
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; RUN: llc -march=mipsel -mattr=+fp64 < %s | FileCheck -check-prefix=FP64EL %s
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; $f12, $f14
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; CHECK-LABEL: testlowercall0:
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; CHECK-DAG: ldc1 $f12, %lo
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; CHECK-DAG: ldc1 $f14, %lo
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define void @testlowercall0() nounwind {
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entry:
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tail call void @f0(double 5.000000e+00, double 6.000000e+00) nounwind
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ret void
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}
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declare void @f0(double, double)
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; $f12, $f14
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; CHECK-LABEL: testlowercall1:
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: lwc1 $f14, %lo
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define void @testlowercall1() nounwind {
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entry:
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tail call void @f1(float 8.000000e+00, float 9.000000e+00) nounwind
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ret void
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}
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declare void @f1(float, float)
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; $f12, $f14
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; CHECK-LABEL: testlowercall2:
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: ldc1 $f14, %lo
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define void @testlowercall2() nounwind {
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entry:
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tail call void @f2(float 8.000000e+00, double 6.000000e+00) nounwind
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ret void
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}
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declare void @f2(float, double)
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; $f12, $f14
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; CHECK-LABEL: testlowercall3:
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; CHECK-DAG: ldc1 $f12, %lo
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; CHECK-DAG: lwc1 $f14, %lo
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define void @testlowercall3() nounwind {
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entry:
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tail call void @f3(double 5.000000e+00, float 9.000000e+00) nounwind
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ret void
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}
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declare void @f3(double, float)
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; $4, $5, $6, $7
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; CHECK-LABEL: testlowercall4:
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; CHECK-DAG: addiu $4, $zero, 12
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; CHECK-DAG: addiu $5, $zero, 13
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; CHECK-DAG: addiu $6, $zero, 14
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; CHECK-DAG: addiu $7, $zero, 15
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define void @testlowercall4() nounwind {
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entry:
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tail call void @f4(i32 12, i32 13, i32 14, i32 15) nounwind
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ret void
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}
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declare void @f4(i32, i32, i32, i32)
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; $f12, $6, stack
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; CHECK-LABEL: testlowercall5:
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; CHECK-DAG: ldc1 $f12, %lo
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; CHECK-DAG: addiu $6, $zero, 23
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; CHECK-DAG: sw ${{[a-z0-9]+}}, 16($sp)
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; CHECK-DAG: sw ${{[a-z0-9]+}}, 20($sp)
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define void @testlowercall5() nounwind {
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entry:
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tail call void @f5(double 1.500000e+01, i32 23, double 1.700000e+01) nounwind
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ret void
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}
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declare void @f5(double, i32, double)
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; $f12, $6, $7
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; CHECK-LABEL: testlowercall6:
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; CHECK-DAG: ldc1 $f12, %lo
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; CHECK-DAG: addiu $6, $zero, 33
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; CHECK-DAG: addiu $7, $zero, 24
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define void @testlowercall6() nounwind {
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entry:
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tail call void @f6(double 2.500000e+01, i32 33, i32 24) nounwind
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ret void
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}
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declare void @f6(double, i32, i32)
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; $f12, $5, $6
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; CHECK-LABEL: testlowercall7:
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: addiu $5, $zero, 43
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; CHECK-DAG: addiu $6, $zero, 34
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define void @testlowercall7() nounwind {
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entry:
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tail call void @f7(float 1.800000e+01, i32 43, i32 34) nounwind
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ret void
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}
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declare void @f7(float, i32, i32)
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; $4, $5, $6, stack
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; CHECK-LABEL: testlowercall8:
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; CHECK-DAG: addiu $4, $zero, 22
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; CHECK-DAG: addiu $5, $zero, 53
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; CHECK-DAG: addiu $6, $zero, 44
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; CHECK-DAG: sw ${{[a-z0-9]+}}, 16($sp)
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; CHECK-DAG: sw ${{[a-z0-9]+}}, 20($sp)
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define void @testlowercall8() nounwind {
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entry:
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tail call void @f8(i32 22, i32 53, i32 44, double 4.000000e+00) nounwind
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ret void
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}
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declare void @f8(i32, i32, i32, double)
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; $4, $5, $6, $7
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; CHECK-LABEL: testlowercall9:
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; CHECK-DAG: addiu $4, $zero, 32
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; CHECK-DAG: addiu $5, $zero, 63
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; CHECK-DAG: addiu $6, $zero, 54
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; CHECK-DAG: lui $7, 16688
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define void @testlowercall9() nounwind {
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entry:
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tail call void @f9(i32 32, i32 63, i32 54, float 1.100000e+01) nounwind
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ret void
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}
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declare void @f9(i32, i32, i32, float)
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; $4, $5, ($6, $7)
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; CHECK-LABEL: testlowercall10:
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; CHECK-DAG: addiu $4, $zero, 42
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; CHECK-DAG: addiu $5, $zero, 73
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; FP32EL-LABEL: testlowercall10:
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; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
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; FP64EL-LABEL: testlowercall10:
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; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
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define void @testlowercall10() nounwind {
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entry:
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tail call void @f10(i32 42, i32 73, double 2.700000e+01) nounwind
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ret void
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}
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declare void @f10(i32, i32, double)
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; $4, ($6, $7)
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; CHECK-LABEL: testlowercall11:
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; CHECK-DAG: addiu $4, $zero, 52
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; FP32EL-LABEL: testlowercall11:
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; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
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; FP64EL-LABEL: testlowercall11:
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; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
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define void @testlowercall11() nounwind {
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entry:
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tail call void @f11(i32 52, double 1.600000e+01) nounwind
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ret void
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}
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declare void @f11(i32, double)
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; $f12, $f14, $6, $7
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; CHECK-LABEL: testlowercall12:
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: lwc1 $f14, %lo
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; CHECK-DAG: lui $6, 16672
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; CHECK-DAG: lui $7, 16808
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define void @testlowercall12() nounwind {
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entry:
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tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind
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ret void
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}
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declare void @f12(float, float, float, float)
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; $f12, $5, $6, $7
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; CHECK-LABEL: testlowercall13:
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: addiu $5, $zero, 83
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; CHECK-DAG: lui $6, 16800
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; CHECK-DAG: addiu $7, $zero, 25
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define void @testlowercall13() nounwind {
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entry:
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tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind
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ret void
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}
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declare void @f13(float, i32, float, i32)
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; $f12, $f14, $7
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; CHECK-LABEL: testlowercall14:
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; CHECK-DAG: ldc1 $f12, %lo
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; CHECK-DAG: lwc1 $f14, %lo
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; CHECK-DAG: lui $7, 16880
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define void @testlowercall14() nounwind {
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entry:
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tail call void @f14(double 3.500000e+01, float 2.900000e+01, float 3.000000e+01) nounwind
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ret void
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}
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declare void @f14(double, float, float)
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; $f12, $f14, ($6, $7)
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; CHECK-LABEL: testlowercall15:
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: lwc1 $f14, %lo
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; FP32EL-LABEL: testlowercall15:
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; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
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; FP64EL-LABEL: testlowercall15:
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; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
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define void @testlowercall15() nounwind {
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entry:
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tail call void @f15(float 4.800000e+01, float 3.900000e+01, double 3.700000e+01) nounwind
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ret void
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}
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declare void @f15(float, float, double)
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; $4, $5, $6, $7
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; CHECK-LABEL: testlowercall16:
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; CHECK-DAG: addiu $4, $zero, 62
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; CHECK-DAG: lui $5, 16964
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; CHECK-DAG: addiu $6, $zero, 64
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; CHECK-DAG: lui $7, 16888
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define void @testlowercall16() nounwind {
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entry:
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tail call void @f16(i32 62, float 4.900000e+01, i32 64, float 3.100000e+01) nounwind
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ret void
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}
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declare void @f16(i32, float, i32, float)
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; $4, $5, $6, $7
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; CHECK-LABEL: testlowercall17:
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; CHECK-DAG: addiu $4, $zero, 72
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; CHECK-DAG: lui $5, 17004
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; CHECK-DAG: addiu $6, $zero, 74
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; CHECK-DAG: addiu $7, $zero, 35
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define void @testlowercall17() nounwind {
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entry:
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tail call void @f17(i32 72, float 5.900000e+01, i32 74, i32 35) nounwind
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ret void
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}
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declare void @f17(i32, float, i32, i32)
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; $4, $5, $6, $7
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; CHECK-LABEL: testlowercall18:
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; CHECK-DAG: addiu $4, $zero, 82
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; CHECK-DAG: addiu $5, $zero, 93
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; CHECK-DAG: lui $6, 16928
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; CHECK-DAG: addiu $7, $zero, 45
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define void @testlowercall18() nounwind {
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entry:
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tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind
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ret void
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}
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declare void @f18(i32, i32, float, i32)
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; $4, ($6, $7), stack
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; CHECK-LABEL: testlowercall20:
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; CHECK-DAG: addiu $4, $zero, 92
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; CHECK-DAG: sw ${{[a-z0-9]+}}, 16($sp)
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; CHECK-DAG: sw ${{[a-z0-9]+}}, 20($sp)
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; FP32EL-LABEL: testlowercall20:
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; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
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; FP64EL-LABEL: testlowercall20:
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; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
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define void @testlowercall20() nounwind {
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entry:
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tail call void @f20(i32 92, double 2.600000e+01, double 4.700000e+01) nounwind
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ret void
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}
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declare void @f20(i32, double, double)
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; $f12, $5
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; CHECK-LABEL: testlowercall21:
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: addiu $5, $zero, 103
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define void @testlowercall21() nounwind {
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entry:
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tail call void @f21(float 5.800000e+01, i32 103) nounwind
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ret void
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}
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declare void @f21(float, i32)
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; $f12, $5, ($6, $7)
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; CHECK-LABEL: testlowercall22:
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: addiu $5, $zero, 113
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; FP32EL-LABEL: testlowercall22:
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; FP32EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP32EL-DAG: mfc1 $7, $f{{[0-9]+}}
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; FP64EL-LABEL: testlowercall22:
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; FP64EL-DAG: mfc1 $6, $f{{[0-9]+}}
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; FP64EL-DAG: mfhc1 $7, $f{{[0-9]+}}
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define void @testlowercall22() nounwind {
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entry:
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tail call void @f22(float 6.800000e+01, i32 113, double 5.700000e+01) nounwind
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ret void
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}
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declare void @f22(float, i32, double)
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; $f12, f6
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; CHECK-LABEL: testlowercall23:
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; CHECK-DAG: ldc1 $f12, %lo
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; CHECK-DAG: addiu $6, $zero, 123
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define void @testlowercall23() nounwind {
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entry:
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tail call void @f23(double 4.500000e+01, i32 123) nounwind
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ret void
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}
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declare void @f23(double, i32)
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; $f12,$6, stack
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; CHECK-LABEL: testlowercall24:
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; CHECK-DAG: ldc1 $f12, %lo
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; CHECK-DAG: addiu $6, $zero, 133
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; CHECK-DAG: sw ${{[a-z0-9]+}}, 16($sp)
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; CHECK-DAG: sw ${{[a-z0-9]+}}, 20($sp)
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define void @testlowercall24() nounwind {
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entry:
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tail call void @f24(double 5.500000e+01, i32 133, double 6.700000e+01) nounwind
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ret void
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}
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declare void @f24(double, i32, double)
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; CHECK-LABEL: testlowercall25:
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: lwc1 $f14, %lo
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; CHECK-DAG: lui $6
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; CHECK-DAG: lui $7
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; CHECK-DAG: lwc1 $f12, %lo
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; CHECK-DAG: addiu $5, $zero, 83
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; CHECK-DAG: lui $6
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; CHECK-DAG: addiu $7, $zero, 25
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; CHECK-DAG: addiu $4, $zero, 82
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; CHECK-DAG: addiu $5, $zero, 93
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; CHECK-DAG: lui $6
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; CHECK-DAG: addiu $7, $zero, 45
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define void @testlowercall25() nounwind {
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entry:
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tail call void @f12(float 2.800000e+01, float 1.900000e+01, float 1.000000e+01, float 2.100000e+01) nounwind
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tail call void @f13(float 3.800000e+01, i32 83, float 2.000000e+01, i32 25) nounwind
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tail call void @f18(i32 82, i32 93, float 4.000000e+01, i32 45) nounwind
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ret void
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}
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