RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 13:02:52 +02:00
Code Issues Projects Releases Wiki Activity
22783c58d6
llvm-mirror/test/MC/Mips/mips32r5
History
Simon Dardis 055516f72f [mips] Correct c.cond.fmt instruction definition. 
Permit explicit $fcc<X> operand in c.cond.fmt instruction.

Add c.cond.fmt to the MIPS to microMIPS instruction mapping table.

Check that $fcc1 - $fcc7 are unusable for MIPS-I to MIPS-III for
c.cond.fmt, bc1t, bc1f.

Reviewers: seanbruno, zoran.jovanovic, vkalintiris

Differential Revision: https://reviews.llvm.org/D24510

llvm-svn: 292117
2017-01-16 13:55:58 +00:00
..
abiflags.s
invalid-mips32.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips32r2.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips32r3.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips64r2.s
invalid.s [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support 2016-07-11 07:41:56 +00:00
valid-xfail.s [mips] Correct c.cond.fmt instruction definition. 2017-01-16 13:55:58 +00:00
valid.s [mips] Correct c.cond.fmt instruction definition. 2017-01-16 13:55:58 +00:00