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1ead7346cd
In particular, this makes the code for 64-bit compares on 32-bit targets
much more efficient.
Example:
define i32 @test_slt(i64 %a, i64 %b) {
entry:
%cmp = icmp slt i64 %a, %b
br i1 %cmp, label %bb1, label %bb2
bb1:
ret i32 1
bb2:
ret i32 2
}
Before this patch:
test_slt:
movl 4(%esp), %eax
movl 8(%esp), %ecx
cmpl 12(%esp), %eax
setae %al
cmpl 16(%esp), %ecx
setge %cl
je .LBB2_2
movb %cl, %al
.LBB2_2:
testb %al, %al
jne .LBB2_4
movl $1, %eax
retl
.LBB2_4:
movl $2, %eax
retl
After this patch:
test_slt:
movl 4(%esp), %eax
movl 8(%esp), %ecx
cmpl 12(%esp), %eax
sbbl 16(%esp), %ecx
jge .LBB1_2
movl $1, %eax
retl
.LBB1_2:
movl $2, %eax
retl
Differential Revision: http://reviews.llvm.org/D14496
llvm-svn: 253572
56 lines
1.4 KiB
LLVM
56 lines
1.4 KiB
LLVM
; RUN: llc -march=x86 -mattr=+cmov,cx16 -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX
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; RUN: llc -march=x86 -mattr=cx16 -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC
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@sc64 = external global i64
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define void @atomic_maxmin_i6432() {
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; LINUX: atomic_maxmin_i6432
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%1 = atomicrmw max i64* @sc64, i64 5 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: sbbl
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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%2 = atomicrmw min i64* @sc64, i64 6 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: sbbl
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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%3 = atomicrmw umax i64* @sc64, i64 7 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: sbbl
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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%4 = atomicrmw umin i64* @sc64, i64 8 acquire
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; LINUX: [[LABEL:.LBB[0-9]+_[0-9]+]]
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; LINUX: cmpl
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; LINUX: sbbl
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; LINUX: cmovne
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; LINUX: cmovne
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; LINUX: lock cmpxchg8b
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; LINUX: jne [[LABEL]]
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ret void
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}
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; rdar://12453106
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@id = internal global i64 0, align 8
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define void @tf_bug(i8* %ptr) nounwind {
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; PIC-LABEL: tf_bug:
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; PIC-DAG: movl _id-L1$pb(
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; PIC-DAG: movl (_id-L1$pb)+4(
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%tmp1 = atomicrmw add i64* @id, i64 1 seq_cst
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%tmp2 = add i64 %tmp1, 1
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%tmp3 = bitcast i8* %ptr to i64*
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store i64 %tmp2, i64* %tmp3, align 4
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ret void
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}
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